Boots – shoes – and leggings
Patent
1988-01-21
1989-02-28
Harkcom, Gary V.
Boots, shoes, and leggings
G06F 938
Patent
active
048091715
ABSTRACT:
An operand processing unit (10) carries out processing of operands in a computer. The unit (10) includes a plurality of operation circuits (12, 14, 16, 18, 20). A source bus (22) provides one operand per clock cycle to the operation circuits (12, 14, 16, 18, 20). A destination bus (24) receives one resultant per clock cycle from the operation circuits (12, 14, 16, 18, 20). Within each operation circuit there is provided an operand processing circuit (80) which performs a selected function with the received operands. These functions include, for example, multiplication, division, addition, subtraction, logical AND, and shift. Logical circuitry provides a priority assignment to the operation circuits (12, 14, 16, 18, 20) for sequencing the loading of operands into the highest priority operation circuit (12, 14, 16, 18, 20) which is not busy processing operands within its corresponding operand processing circuit (80). The operand processing unit (10) provides concurrent processing of operands to enhance processing speed. The operands and resultants are handled in a manner such that there is a uniform and sequential flow of operands from a source, such as main memory, and a uniform and sequential delivery of resultants to a destination, such as a memory or input/output device.
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Dozier Harold W.
Gruger Jeffrey H.
Jones Thomas M.
Wallach Steven J.
Convex Computer Corporation
Harkcom Gary V.
Lacasse Randy W.
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