Multiplex communications – Wide area network – Packet switching
Patent
1989-05-08
1991-02-05
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 581, 370 655, 340826, 3408258, H04Q 1100
Patent
active
049911686
ABSTRACT:
A network control arrangement where stage-specific busy/idle information is stored using individual memories for each stage, and path hunting is effected by combining the busy/idle information for all stages concurrently rather than sequentially. A single binary number, comprising a concatenation of an inlet number, a path number and an outlet number, uniquely identifies a particular network path between a given inlet and outlet. The stage busy/idle information for the path components, e.g., network nodes or links, for all network path between the given inlet and outlet is stored at a single address of a stage memory. The memory address for a particular stage is a specified subset of the bits of the inlet and outlet numbers. The memories for all stages are read concurrently to simultaneously determine all idle paths and, after a path is selected, all stage memories are concurrently updated. Stage-specific subsets of the bits of the binary number comprising the concatenation of the inlet and outlet numbers with the path number associated with the selected path are used to access all components of that path to enable communication.
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A. Feiner et al., "No. 1 ESS Switching Network Plan", The Bell System Technical Journal, vol. XLIII, Sep. 1964, No. 5, Part 2, pp. 2193-2220.
W. Ulrich, "No. 1 ESS Network Sequences and Program", Electronic Switching Symposium, 1963, pp. 14-1-14-13.
AT&T Bell Laboratories
Hsu Alpus H.
Olms Douglas W.
Watland R. T.
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