Concurrent electronic circuit design and implementation

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364488, G06F 1750

Patent

active

056731981

ABSTRACT:
A system for providing real time design feedback to a user of a data processing system for designing an electronic circuit includes a display system, a graphical, textual or mixed user input process which displays user input on the display system for designing an electronic circuit, and an implementation process with which generates an implementation of the electronic circuit in for example a field programmable gate array. Feedback is provided by monitoring the user input process to detect a change in the design of the electronic circuit. Upon detection of a change, information about the change is forwarded to the implementation process. The implementation process is executed as a background process to the user input process, in response to the change to produce implementation data on an incremental basis. Information about the implementation data is displayed on the display system as feedback to the user during the design process. Analysis of the implementation data produces information indicating the speed of operation of the generated implementation, information indicating the size of the generated implementation, or information consisting of a particular type of integrated circuit device on which the implementation should be made. The system provides immediate implementation feedback allowing an interactive design entry process for computer software based integrated circuit design.

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"The Evolution of PLD, CPLD and FPGA Design Tools," Electronic Engineering, Oct. 1993, pp. 541-548. No Author Info.
Stephen M. Trimberger, "Field-Programmable Gate Array Technology", Kluwer Academic Publishers, pp. 53-68, 128-132, and 204-218. Copyright 1994.

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