Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-08-15
2006-08-15
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257SE23144, C257SE23154
Reexamination Certificate
active
07091615
ABSTRACT:
A process for forming an interlayer dielectric layer is disclosed. The method comprises first forming a carbon-doped oxide (CDO) layer with a first concentration of carbon dopants therein. Next, the CDO layer is further formed with a second concentration of carbon dopants therein, wherein the first concentration is different than the second concentration.
REFERENCES:
patent: 5872401 (1999-02-01), Huff et al.
patent: 6068884 (2000-05-01), Rose et al.
patent: 6077764 (2000-06-01), Sugiarto et al.
patent: 6147009 (2000-11-01), Grill et al.
patent: 6159845 (2000-12-01), Yew et al.
patent: 6211096 (2001-04-01), Allman et al.
patent: 9867869 (2001-05-01), Andideh et al.
patent: 6258735 (2001-07-01), Xia et al.
patent: 9972228 (2001-10-01), Andideh et al.
patent: 6331494 (2001-12-01), Olson et al.
patent: 6407013 (2002-06-01), Li et al.
patent: 6410462 (2002-06-01), Yang et al.
patent: 6423630 (2002-07-01), Catabay et al.
patent: 6436822 (2002-08-01), Towle
patent: 6440876 (2002-08-01), Wang et al.
patent: 6441491 (2002-08-01), Grill et al.
patent: 6482754 (2002-11-01), Andideh et al.
patent: 6531398 (2003-03-01), Gaillard et al.
patent: 2001/0009295 (2001-07-01), Furusawa et al.
patent: 2001/0010970 (2001-08-01), Uglow et al.
patent: 2001/0036723 (2001-11-01), Torres et al.
patent: 2002/0058405 (2002-05-01), Huang et al.
patent: 2002/0072221 (2002-06-01), Nishimura et al.
patent: 2003/0001240 (2003-01-01), Whitehair et al.
patent: 2003/0077921 (2003-04-01), Andideh et al.
patent: 2003/0227090 (2003-12-01), Okabe
patent: 2004/0061235 (2004-04-01), Barth et al.
patent: 2004/0097068 (2004-05-01), Yuasa
patent: 1 050 600 (2000-11-01), None
patent: 1 050 601 (2000-11-01), None
patent: 1 077 477 (2001-02-01), None
patent: 1 148 539 (2001-10-01), None
patent: 1 195 451 (2002-04-01), None
patent: 1 201 785 (2002-05-01), None
patent: WO 99/38202 (1999-07-01), None
Search Report for PCT/US02/31525, mailed Jan. 22, 2003, 5 pages.
D. Weber, et al., “Impact of substituting SIO ILD by low k materials into A/CU Rie metalization”, Infineon Technologies AG, Konigsbruckersrafe 180, D-01099 Dresden.
Gernamy, current address: Infineon technologies, Inc. IBM Semiconductor Research and Development Center, Hopewell Junction, NY 12533, USA, date unknown.
Andideh Ebrahim
Bohr Mark
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
LandOfFree
Concentration graded carbon doped oxide does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Concentration graded carbon doped oxide, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Concentration graded carbon doped oxide will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3622165