Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system
Patent
1999-04-14
2000-10-17
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Processing architecture
Distributed processing system
712 23, 712 11, G06F 1500
Patent
active
061346470
ABSTRACT:
A data processing system includes a plurality of nodes, a serial data bus interconnecting the nodes in series in a closed loop for passing address and data information, and at least one processing node. In one construction, this processing node has a processor, a printed circuit board, a memory partitioned into first and second sections and a local bus connecting the processor, a block sharable memory section of the memory, and the printed circuit board. The local bus is used for transferring data in parallel from the processor to a directly sharable memory section of the memory on the printed circuit board and for transferring data from the block sharable memory to the printed circuit board. The printed circuit board includes a sensor for sensing when data is transferred into the directly sharable memory, a queuing device for queuing the sensed data, a serializer for serializing the queued data, a transmitter for transmitting the serialized data onto the serial data bus to the next successive processing node, a receiver for receiving serialized data from next preceding processing node, and a deserializer for deserializing the received serialized data into parallel data.
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"Continuous econfiguration in a Multi-Microprocessor Flight Control System", Lt. S. L. Maher/Capt. S. J. Larimer, AGARD Conference Proceedings No. 303 -"Tactical Airborne Distributed Computing and Networks" Roros, Norway 22-25 Jun. 1981.
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"An Architecture for Event-Driven Real-Time Distributed Computer System" James E. McDonald (AFWAL/AAAF)-pp. 688-694.
Acton John D.
Derbish Michael D.
DeRolf William B.
Gibson Gavin G.
Hardy, Jr. Jack M.
An Meng-Ai T.
Kivlin B. Noel
Monestime Mackly
Sun Microsystems Inc.
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