Computing circuit, computing apparatus, and semiconductor...

Electrical computers: arithmetic processing and calculating – Electrical analog calculating computer – Particular function performed

Reexamination Certificate

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C708S671000, C708S201000

Reexamination Certificate

active

06691145

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a computing circuit for performing computations on analog signals, a computing apparatus using the same, and a semiconductor computing circuit suitable for use therein, and more particularly to a computing circuit for computing an absolute difference between two analog signals, and a computing apparatus for computing a Manhattan distance which is a measure of a similarity to a reference pattern.
With the advance of computer technology, dramatic strides have been made in data processing technology in recent years. However, if flexible information processing, such as visual recognition or voice recognition as is done by humans, is to be implemented using a computer, it is said that, with today's digital computers, it is almost impossible to provide computation results in real time. One reason for this is that much of the information we handle in our daily lives is in the form of analog quantities and, when these quantities are represented by digital data, not only does the amount of data become prohibitively large but also the data is inaccurate and ambiguous. It can be said that the problem of today's information processing systems lies in the fact that such extremely redundant analog data are all converted to digital quantities and rigorous digital computations are performed one by one. Furthermore, in today's information processing systems, the computing circuit for performing digital computations and the memory for holding digital data are provided as separate elements, and as a result, a very long computation time is required because of the bus bottleneck between the computing circuit and the memory.
To solve such problems, attempts are being made to achieve information processing more analogous to the human brain by taking in information from the external world in its original form, i.e., in the form of analog quantities, and by performing computations directly on the analog quantities. One such approach to information processing involves evaluating the similarity between an input signal pattern and a prestored analog pattern. More specifically, a large number of voice or image code patterns are stored in advance and, by comparing the input signal pattern with each code pattern for similarity, a code pattern having the highest similarity is extracted. Similarity is measured using the Euclidean distance or the Manhattan distance (the sum of absolute differences); since the computation of the Manhattan distance can be accomplished by calculating only differences whereas the computation of the Euclidean distance requires a multiplication as well and, since, in such processing, evaluating the degree of correlation is of major concern and mathematically rigorous computations are not required, it is common to measure similarity using the Manhattan distance. The semiconductor computing circuit of the present invention lends itself to computation of the Manhattan distance.
Various methods have been proposed for performing computations directly on analog quantities. For example, Japanese Unexamined Patent Publication No. 3-6679 discloses a neuron MOS transistor which behaves like a neuron, a nerve cell, and performs summation of a plurality of analog input signals. Japanese Unexamined Patent Publication No. 6-53431 discloses a computing circuit utilizing this neuron MOS transistor. Further, Republished Patent No. WO96/30853 discloses a semiconductor computing circuit which uses two MOS transistors having a floating gate, with their sources or drains connected together, and which, by applying two analog signals and their difference signal to control gates, computes an absolute-value voltage representing the difference between the two analog signals.
When computing the Manhattan distance, usually the code pattern is predetermined and the similarity between the input signal and the predetermined code pattern is evaluated; once the code pattern is set in the computing circuit, it is desirable that the computation be performed continuously on various image input signals, and it is rare that the code pattern is changed. However, the computing circuit disclosed in the above cited Republished Patent No. WO96/30853 requires that two analog signals or their processed signals be input for each computation. To meet this requirement, a memory for holding code patterns must be provided, and signals read from the memory must be set in each computing cell of the computing circuit each time the computation is performed; this not only increases the computation time but also presents the problem that the wiring for delivering the signals read from the memory to the respective computing cells of the computing circuit becomes enormous. Moreover, if the code pattern is stored in digital signal form, a D/A converter for converting it into an analog signal must be provided, which causes the problem that the amount of circuitry increases.
Further, when performing the computation, it is desirable that input signals be able to be input directly without having to perform computations on them.
SUMMARY OF THE INVENTION
The present invention has been devised to solve the above problems, and an object of the invention is to provide a computing circuit capable of computing an absolute difference with high-speed analog computation, a computing apparatus capable of computing the sum of absolute differences, and a semiconductor computing circuit achievable with simple circuitry and suitable for use in such a computing circuit or apparatus.
FIGS. 1
to
5
are diagrams showing the basic configuration of the computing circuit and computing apparatus of the present invention. To achieve the above object, the computing circuit for computing the absolute difference between a first signal St and a second signal Si, according to the present invention, compares the first and second signals, distinguishes between the larger one and the smaller one, and computes the absolute difference by subtracting the smaller one from the larger one.
More specifically, the computing circuit of the present invention is a computing circuit for computing the absolute difference between the first signal St and the second signal Si, and comprises a large input selection circuit
1
which outputs either the first signal or the second signal whichever is larger, a small input selection circuit
2
which compares the first and second signals and outputs whichever signal is smaller in signal value, and a subtraction circuit
3
which subtracts the output of the small input section circuit
2
from the output of the large input selection circuit
1
.
As shown in
FIG. 2
, the subtraction circuit
3
comprises, for example, a capacitor
6
, a first switch
4
provided between a first terminal of the capacitor
6
and the output of the large input selection circuit
1
, a second switch
5
provided between the first terminal of the capacitor
6
and the output of the small input selection circuit
2
, and a third switch
7
provided between a second terminal of the capacitor
6
and a terminal connected to a prescribed potential. After turning the first switch
4
off and the third switch
7
on, when the second switch
5
is turned on the capacitor
6
is charged to the smaller signal level. After that, when the third switch
7
is turned off, and the second switch
5
is also turned off, the charged condition is maintained. Then, when the first switch
4
is turned on, the voltage at the first terminal changes from the smaller one to the larger one, and the potential of the second terminal increases by the amount of the change. In other words, the potential of the second terminal rises from the prescribed potential by an amount equal to the larger one minus the smaller one, i.e., the absolute difference between them. The computation of the absolute difference between the first signal and the second signal is thus accomplished.
Further, as shown in
FIG. 3
, if the second terminal of the capacitor is made a floating gate
10
, and the floating gate is a gate of a source follo

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