Computer to computer communication system

Communications: electrical – Digital comparator systems

Patent

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Details

3401461BA, 235306, G08C 2502, G06F 1108

Patent

active

040706486

ABSTRACT:
A computer to computer data communication system for minimizing software protocol is disclosed wherein transmitted errors in data transmitted from one computer to another are detected when they occur by means of a bit-by-bit data echo transmission technique. True and inverted or complementary data are transmitted simultaneously serially over twisted pair lines for comparison, bit-by-bit by comparing each transmitted bit to the corresponding inverted bit to derive an error signal indicative of the condition of like polarity of the compared bits. If the compared bits are of like polarity, an error signal is generated to enable correction of the transmission error on a word by word basis, while inhibiting processing of the uncorrected data. Concurrently, received data is returned to the transmitting processor over a return data line for a like comparison. When an error condition exists, the returned data is inverted, forcing an error condition and inhibiting further transmission for the remainder of the transfer cycle. Thus, bit-by-bit detection, word-by-word correction and a variable block length capability in a double data transfer environment are accomplished, with both data processing and transmission inhibited until data errors are corrected.

REFERENCES:
patent: 2512038 (1950-06-01), Potts
patent: 3427585 (1969-02-01), Milford
patent: 3453592 (1969-07-01), Ishii et al.
patent: 3523279 (1970-08-01), Briley et al.
patent: 3624603 (1971-11-01), Delcomyn
patent: 3934131 (1976-01-01), Perschy
patent: 3934224 (1976-01-01), Dulaney et al.

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