Computer system with error handling before reset

Details Computer system with error handling before reset Computer system with error handling before reset

1994-09-09

1997-02-04

Beausoliel, Jr., Robert W.

G06F 1134

Patent

active

056007850

ABSTRACT:
A computer system includes error handling hardware and software that logs the source of application program or system software errors before a reset occurs. Upon a catastrophic error, a retriggerable timer, which is periodically retriggered during normal system operation, instead times out causing a hardware reset. A predetermined time before this retriggerable timer times out, however, the microprocessor in the computer system is interrupted, and executes an interrupt routine in which it determines that the retriggerable timer is about to timeout, and logs the currently executing applications program or currently executing point in system software, as well as the actual location within the applications program or the system software. The reset subsequently occurs, but not before this information valuable for debugging and diagnosis is logged.

REFERENCES:
patent: 4803682 (1989-02-01), Hara et al.
patent: 4982404 (1991-01-01), Hartman
patent: 5041962 (1991-08-01), Lunsford
patent: 5139473 (1992-08-01), Bradshaw et al.
patent: 5333285 (1994-07-01), Drerup
IBM Technical Disclosure Bulletin, Mar. 1980, U.S., European Patent Office, vol. 22, pp. 4690-4691.

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