Boots – shoes – and leggings
Patent
1984-12-17
1988-05-03
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 1206
Patent
active
047424460
ABSTRACT:
A computer system includes a processing unit; main storage; cache buffer storage provided between the processing unit and the main storage; and a store buffer device between the processing unit and main storage, receiving data identical to that stored in the cache buffer storage and control information in response to requests from the processing unit and transferring the data and control information to main storage. The transmission from the processing unit to the store buffer device and from the store buffer device to main storage are in a machine cycle. The store buffer device includes a controller, data register sets, each set including registers for receiving data to be stored in main storage, a byte mark register set of byte mark registers for information indicating storable data in the data registers, and an address register set of address registers for a starting store address in main storage for the data in the data registers. The number of data register sets is a plurality of times the bus width of the central processor. Each byte mark register has bits corresponding to the number of data register sets multiplied by the number of bytes in each data register.
REFERENCES:
patent: 4045781 (1977-08-01), Levy
patent: 4047243 (1977-09-01), Dijkstra
patent: 4315312 (1982-02-01), Schmidt
patent: 4323968 (1982-04-01), Capozzi
patent: 4344130 (1982-08-01), Fung
patent: 4439829 (1984-03-01), Tsiang
patent: 4467414 (1984-08-01), Aragi et al.
Morioka Tetsuya
Oinaga Yuji
Onishi Katsumi
Tanaka Tsutomu
Chan Emily Y.
Fujitsu Limited
Zache Raulfe B.
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