Computer system to compress pixel bits

Details Computer system to compress pixel bits Computer system to compress pixel bits

1997-11-12

1999-09-14

Moise, Emmanuel L.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

382233, 382235, 395102, 395109, 395112, G06F 700, G06F 1500

Patent

active

059516240

ABSTRACT:
A computer system to compress bit formats provided in a first packed data sequence. The computer system include a processor, a multimedia input device to receive an image or audio input, a memory having stored thereon a set of packed data sequences having data elements representing the input, and a compression routine for manipulating the input. When the compression routine is executed by the processor, the routine causes the processor to: generate a second packed data sequence by copying the first packed data sequence; mask a portion of the first packed data sequence; shift data elements of the first packed data sequence, in response to executing a single first instruction, wherein the data elements are independently shifted by separate shift counts; mask a portion of the second packed data sequence; and generate a final result by joining the second and first packed data sequences.

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