Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing
Patent
1996-03-21
2000-08-22
Toplu, Lucien U.
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
Least weight routing
709102, 709107, G06F 946
Patent
active
061086835
ABSTRACT:
A computer-system fixed-priority process scheduler that is supported by an operating system (OS) and establishes fixed priorities respectively corresponding to a plurality of processes to be scheduled. Further, the priorities can be changed by designation from the user processes. The process scheduler allocates a central processing unit (CPU) to executable ones of the processes in the descending order of the priorities thereof. Moreover, a user-level process scheduler is provided in a fixed-priority process scheduler space, namely, in a real-time class process scheduler space. The user-level process scheduler has a first priority of a real time class. Furthermore, the user-level process scheduler performs the scheduling of a group of other user processes, which have priorities lower than the first priority, and causes the group of such user processes to operate or run. Namely, the user-level process scheduler determines the allocation of the CPU to such user processes and requests the OS to execute such user processes.
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Inohara et al, A Thread Facility Based On User/Kernel Cooperation In The Xero Operating System, IEEE 1991.
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Anderson et al, Scheduler Activations: Effective Kernel Support For The User-Level Management Of Parallelism, ACM 1991.
Yu et al, Scheduling Parallelizable Imprecise Computations On Multiprocessors, IEEE 1991.
Kamada Jun
Ono Etsuo
Yuhara Masanobu
Fujitsu Limited
Toplu Lucien U.
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