Patent
1996-11-15
1999-04-06
Beausoliel, Jr., Robert B.
39518501, G06F 1120
Patent
active
058928960
ABSTRACT:
When an error occurs in a memory card of a computer system, error information having an error occurrence time, a number of a memory card in which the error has occurred, and an error status are sequentially stored as the error history information in a random access memory (RAM) connected to a system bus in the computer system. A number of errors of the memory card on which the error has occurred and an interval between the errors are calculated based on the error history information. When the calculation results deviate from each predetermined value, the memory card is deleted (e.g., disconnected from a memory board of the computer system) as having an intermittent fault or a high frequency of fault occurrence. During access to the memory, by referring to an address decode register, a memory card number is identified from the most-significant portion of the address.
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Badesman Scott T.
Beausoliel, Jr. Robert B.
NEC Corporation
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