Computer system including a page mode memory with decreased acce

Details Computer system including a page mode memory with decreased acce Computer system including a page mode memory with decreased acce

1988-05-26

1991-07-23

Shaw, Gareth D.

Boots, shoes, and leggings

3649571, 364957, 3649711, 364965, 3649658, 365203, 365235, G06F 700, G06F 800

Patent

active

050349171

ABSTRACT:
A computer system is provided in which memory access time is substantially reduced. After row address strobe (RAS) and column address strobe (CAS) signals are used to select a particular address in a memory during a first memory cycle, the addressed data is latched for later transfer to a data bus. A CAS precharge of the memory is then conducted after such latching and prior to the end of the first memory cycle before the commencement of the second memory cycle.

REFERENCES:
patent: 4239993 (1980-12-01), McAlexander, III et al.
patent: 4318014 (1982-03-01), McAlister et al.
patent: 4422160 (1983-12-01), Watanabe
patent: 4429375 (1984-01-01), Kobayashi et al.
patent: 4581721 (1986-04-01), Gunawardana
patent: 4623986 (1986-11-01), Chauvel
patent: 4625300 (1986-11-01), McElroy
patent: 4649522 (1987-03-01), Kirsch
patent: 4658381 (1987-04-01), Reed et al.
patent: 4722074 (1988-01-01), Fujishima et al.
patent: 4727517 (1988-02-01), Ueno et al.
patent: 4754433 (1988-06-01), Chin et al.
patent: 4764901 (1988-08-01), Sakurai

Affiliated with

Also associated with

Rating

Computer system including a page mode memory with decreased acce does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer system including a page mode memory with decreased acce, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer system including a page mode memory with decreased acce will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-437826