Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing
Reexamination Certificate
1996-12-23
2004-01-20
Lao, Sue (Department: 2126)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
Least weight routing
C709S241000
Reexamination Certificate
active
06681239
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to digital computer systems, and in particular computer operating systems which support multiple simultaneous tasks.
BACKGROUND OF THE INVENTION
A modem computer system typically comprises a central processing unit (CPU), and other supporting hardware such as system memory, communications busses, input/output controllers, storage devices, etc. The CPU is the heart of the system. It executes the instructions which comprise a computer program and directs the operation of the other system components. Typically, the instructions which execute on the CPU may be part of the computer's operating system, or may be part of an application program which performs some particular work for a user.
The operating system may be thought of as that part of the programming code executing on the computer, which regulates the computer's function, while the application programs perform specific work on behalf of a user. Operating systems vary considerably in complexity and function. A very simple operating system for a single-user computer may handle only a single task at a time, mapping all data into a single address space, and swapping data into and out of the address space whenever a new task must be performed. An operating system for a computer which supports multiple simultaneous users must manage the allocation of system resources among the different users. In particular, it must manage the allocation of address space and system memory.
The address space of the system is the range of addresses available to reference data, instructions, etc., and is determined by the size (bit length) of the address. Usually, the address space is significantly larger than the number of actual physical memory locations available on the system. The address size is one of the fundamental architectural features of the computer system. All other things being equal, a larger address size is naturally desirable from the standpoint of capacity of the system to do work. However, the address size entails significant hardware cost. The size of buses, registers, and logic units throughout the system is intimately tied to the address size.
In the early days of computers, hardware was a relatively expensive commodity. Many early systems used 16-bit or smaller addresses. Usually, the amount of data contained in these systems exceeded the size of the address space. An individual program might fit well within the address space, but a user might have many programs to execute on the system. Additionally, multi-user systems required space for each user.
The earliest systems executed only a single application at a time. Typically, storage became hierarchical. Although the total number of addresses exceeded the address space available in main memory, address space could be re-used. Data (including programs) were normally stored in a large secondary storage on disk, drum, tape or other secondary storage devices. When a particular application was needed, it was loaded into main memory and addresses were mapped into the address space of main memory. When no longer needed, it was deleted from main memory but retained in secondary storage. The address space was then re-used. If the same application was needed again, it could be loaded again into main memory.
As computers became more sophisticated, it became common for computer systems to execute multiple tasks concurrently. Operating systems designed for such computer systems were required to manage operations within the available address space of the computer. Since the addresses needed typically exceeded the address space available in the processor's hardware, this was done by allocating a separate address space to each task, resulting in multiple virtual address spaces. Typically, the task's virtual address space was the same size as the address space of the computer's processor.
This multiple virtual address space approach necessarily meant that different bytes of data might have the same virtual address, although they would be in the virtual address spaces of different tasks. When a task was loaded into main memory from secondary storage, a mapping mechanism mapped virtual addresses in the virtual address space of the task to physical addresses in the main memory of the computer system. This increased the complexity of the operating system, but was necessary to cope with the limited size of the system's address space.
As an alternative to the multiple virtual address space architecture, it possible to utilize a single very large system address space, one which is sufficiently large that it is not necessary to have multiple overlapping virtual address spaces, one for each task. Each task has its own discrete portion of the large system address space. One major impediment to this alternative architecture is that is requires a very large system address space, and consequently requires additional hardware to support it. When hardware was very expensive, this alternative appeared unattractive. For that reason, most multi-tasking systems have utilized the multiple virtual address space approach.
With the alternative single large address space approach, programs and other data stored in a computer system can be assigned persistent, unique logical addresses in the large system address space. Because these logical addresses are not duplicated, they can be used to identify data either in main memory or in secondary memory. For this reason, this alternative is sometimes referred to as a single level storage architecture. Examples of such an alternative architecture are the IBM System/38 computer system (formerly manufactured and distributed by IBM Corporation), its successor, the IBM AS/400 System (currently manufactured and distributed by IBM Corporation), and the Opal system at the University of Washington. For additional background concerning the IBM System/38 and IBM AS/400 System, see
IBM System
/38
Technical Developments
(International Business Machines Corporation, 1978),
IBM Application System
/400
Technology
(International Business Machines Corporation, 1988), and
IBM Application System
/400
Technology Journal
, Version 2 (International Business Machines Corporation, 1992). The Opal system is described in a series of academic papers, including J. Chase, et al., “Opal: A Single Address Space System for 64-bit Architectures”,
Proc. IEEE Workshop on Workstation Operating Systems
(April, 1992).
When compared with the more traditional multiple virtual address space approach, the single level storage architecture offers certain advantages. These advantages are particularly applicable to object oriented programming applications. The object oriented (OO) programming paradigm anticipates that a large number of small code segments will have internal references (pointers) to one another, that these segments may be owned by different users, that during execution of a task, flow of control may jump frequently from one segment to another, and that different tasks executing on behalf of different users will often execute the same code segment.
Where a system uses multiple virtual address spaces, the pointers to different code segments will reference code in the virtual address space of another task or user. Resolution of these pointers becomes difficult. Because multiple overlapping virtual address spaces exist, it is possible that different code segments will share the same virtual address, but in the address space of different tasks or users. It is also possible that the executing task will have assigned the virtual address to some other data. Therefore, it is not possible to directly reference data or code in a segment belonging to a different task or user in the same manner an executing task would use a pointer to its own code in its own virtual address space. There must be a mechanism for resolving the various pointers so that the correct code segment is referenced.
Such mechanisms for resolving pointers in a multiple virtual address space system are possible, but they are awkward and tend to impose a
Munroe Steven Jay
Plaetzer Scott Alan
Stopyro James William
International Business Machines - Corporation
Lao Sue
Truelson Roy W.
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