Boots – shoes – and leggings
Patent
1991-12-09
1995-11-21
Black, Thomas G.
Boots, shoes, and leggings
395285, 395308, 395303, 395474, 395475, 395476, 395650, 39520003, 3642386, 364239, 364DIG1, 3642705, 3642707, 364939, 3649501, G06F 1300
Patent
active
054695490
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to digital computer systems and, more specifically, to systems having multiple independent processors.
2. Description of the Related Art
There is a continuing growth in the amount of computer power required to support digital data processing applications. One response to this problem is to develop larger, faster and more complex single processors; another is to couple multiple processors together, for example by high speed data buses.
With existing forms of computer system using intercommunicating multiple processors, various problems arise and the object of the present invention is to provide an alternative multi-processor system, preferably incorporating an integrated associated hardware/software system concept, which may be preferred for some application areas.
SUMMARY OF THE INVENTION
According to the invention, there is provided a distributed computer system comprising: private data memory linked to the processor by way of a private data bus; the computer units via the associated private data buses for each computer unit to be able to communicate with any other computer unit by way of a respective two-way data route comprising a respective individual area of shared data memory; and shared data memory means for responding to control data issued by the processor of any computer unit to initiate communication via a route determined by the processor.
BRIEF DESCRIPTION OF THE DRAWINGS
For a better understanding of the invention, reference will be made, by way of example, to the accompanying drawings, in which:
FIG. 1 is a diagram for explaining the general nature of inter-process communication used in the present invention;
FIG. 2 is a simplified diagram of part of a computer system; and
FIG. 3 is a diagram for explaining the use of the FIG. 2 system in the context of an integrated hardware/software development environment.
DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EXEMPLARY EMBODIMENTS
In connection with the system to be described, reference will be made to a so-called Data Interaction Architecture (DIA), following the emphasis on the data which lies between concurrent system processes. The term Architecture is used in the sense of the elements, and their interconnection and grouping, which go to make up a digital data processing system. Essentially these elements are the software processes and hardware processors which communicate through shared data areas declared in shared memory. Thus, the DIA covers multi-tasking software as well as multi-processing; hardware implementation. The DIA can be seen as an integrating technology which provides a framework for system and component design. It is a general approach which is usable with a wide range of processor types and programming languages.
In a computer system, inter-process and inter-processor communication may be direct, i.e. in total synchronism with the "reading and writing" processes being locked together at the point of communication. Data independent of the processes cannot exist since there is no data area (or process) which can hold information in transit. This is the rendezvous style of communication which naturally introduces severe timing interdependences between the two processes. A monitor process can be interposed in the communication path so as, in effect, to decouple the operation of the reader and writer processes, but this is only at the expense of significant additional overheads and cannot entirely remove the timing interactions.
The system to be described, i.e. DIA, comprises a real time network where communication via shared memory, i.e. it is indirect as shown in FIG. 1. This form of communication is more flexible than those referred to above in that it can be used to provide a wide range of communication protocols including; fully and conditionally asynchronous, loosely synchronous (the bounded buffer) and fully synchronous (the rendezvous) forms. Asynchronous and loosely synchronous protocols avoid the tight interlocked timing rela
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