Computer system employing an enable line for selectively adjusti

Details Computer system employing an enable line for selectively adjusti Computer system employing an enable line for selectively adjusti

1994-09-19

1997-10-14

Ray, Gopal C.

395556, G06F 1300, G06F 1338

Patent

active

056780656

ABSTRACT:
A system is described for facilitating operation of a peripheral bus, such as a PCI bus, at different clock frequencies. One embodiment includes an enable line (66 MHzENABLE) connected to each of the devices resident on the PCI bus. The enable line is passively pulled high through a pull-up resistor if all devices resident on the PCI bus can support high frequency operation (such as, for example, 66 MHz). If any device cannot support high frequency operation, the device internally connects the enable line to ground in accordance with present industry specifications. Thus, the enable line will be passively high only if all of the PCI devices support high frequency operation, but will be asserted low if any device cannot support high frequency operation. The invention also includes a dedicated status bit to permit the system to warn the operator of discrepancies between device and bus capabilities.

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Michael Bailey, PCI Local Bus Breaks Data Bottleneck To Open Up PC Technology, 8211 Computer Technology Review, Sep. 12, 1993, No. 11, Los Angeles, CA, pp. 15-17.

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