Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing
Reexamination Certificate
1995-12-15
2004-04-27
Lao, Sue (Department: 2126)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
Least weight routing
Reexamination Certificate
active
06728746
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a computer system comprising a plurality of machines connected to a shared memory and a control method for a computer system comprising a plurality of machines connected to a shared memory. More particularly, the present invention relates to a computer system comprising a plurality of machines connected to a shared memory and a control method for the same system, wherein improved controls are attained than in conventional systems.
Recently, computer systems in which a plurality of machines are connected to each other via a shared memory are generally used because of a reduced rate of evolution in the capability of a single processor and a strong need for improvement in reliability. There is also a demand for operating a computer system as a plurality of virtual computer systems, by using a shared memory.
Further, there is a demand for a system having a hot-standby capability, wherein it is possible to detect a system down occurring when a system operated under an AVM (an OS for controlling a virtual computer system) is down due to an abnormality.
2. Description of the Prior Art
(1) Conventional computer system—
1
A description will first be given of a first conventional computer system.
FIG. 1
shows the construction of a first conventional computer system.
In the example of
FIG. 1
, a machine
10
is operated as a plurality of virtual machines
11
-
1
-
11
-n (hereinafter, referred to as logic machines). The machine
10
has an operating system (hereinafter, referred to as an AVM)
12
for controlling the logic machines
11
-
1
-
11
-n.
(2) Conventional computer system—
2
Secondly, a description will be given of a case where a computer system is connected to a shared memory.
FIG. 2
shows the construction of a second conventional computer system.
In the example of
FIG. 2
, the above-mentioned machine
10
is connected to a shared memory
50
. The machine
10
and the shared memory
50
is connected via a real access path
60
provided in the shared memory
50
. The machine
10
reads information from and writes information to the shared memory
50
.
The machine
10
is provided with the AVM
12
and the plurality of logic machines
11
-
1
-
11
-n. A logic (virtual) access path
71
is disposed between the AVM
12
and each of the logic machines
11
-
1
-
11
-n. The logic machines
11
-
1
-
11
-n read information from and writes information to the shared memory
50
via the access path
71
and the AVM
12
.
FIG. 3
is a diagram explaining the second conventional computer system.
In the second conventional computer system shown in
FIG. 3
, the machine
10
is connected to a shared memory
51
via an access path
61
, and a machine
20
is connected to the shared memory
51
via an access path
62
. A machine
30
is connected to a shared memory
52
via an access path
63
, and a machine
40
is connected to the shared memory
52
via an access path
64
.
The machine
10
connected to the shared memory
51
is executing a process with respect to the shared memory
51
. One of the logic machines in the machine
20
is in a standby state under the control of the AVM, and another in the machine
20
is used in developing a computer system. The machine
30
connected to the shared memory
52
is executing a process with respect to the shared memory
52
, and the machine
40
is in a standby state. In this way, exclusive control is imposed when the system shown in
FIG. 3
is in a hot-standby mode such that, while one of the machines
10
(
30
) is executing a process with respect to the shared memory
51
(
52
), the other machine
20
(
40
) is in a standby state.
(3) Conventional computer system—
3
Thirdly, a description will be given of a case where a plurality of machines are connected to a shared memory.
FIG. 4
shows the construction of a third conventional computer system.
In the computer system shown in
FIG. 4
, a plurality of machines
10
,
20
,
30
and
40
are connected to the shared memory
50
. The machines
30
and
40
are operated as virtual machines. Logic machines in each of the virtual machines
30
and
40
are provided with a relative machine No. For example, the logic machine
31
-
1
is provided with an No.
1
, the logic machine
31
-
2
an No.
2
, the logic machine
31
-
3
an No.
3
, and the logic machine
40
an No.
4
. Likewise, the logic machine
41
-
1
of the virtual machine
40
is provided with an No.
1
, the logic machine
41
-
2
an No.
2
, the logic machine
42
-
3
an No.
3
, and the logic machine
41
-
4
an No.
4
. Further, the machine
10
is provided with a real machine No.
0
, the machine
20
a real machine No.
1
, the machine
30
a real machine No.
2
and the machine
40
a real machine No.
3
.
A description will be given of a case where an operator
80
specifies the logic machine
31
-
1
of the machine
30
. When the operator
80
specifies the real machine No.
2
of the machine
30
, it means that an AVM
32
of the machine
30
having the real machine No.
2
is specified. According to a predetermined sequence, the AVM
32
specifies a relative machine No.
1
, for example, indicating the logic machine
31
-
1
of the machine
30
. In a computer system comprising a plurality of machines connected to each other via a shared memory, a virtual machine operated under the AVM allows only one logic machine under its control to be connected to another computer. Since, the real machine No. and the logic machine are in one-to-one correspondence at a given moment, it is possible to specify a logic machine by specifying a real machine No. When the operator
80
specifies the real machine No.
2
, for example, it means that the logic machine
31
-
1
is specified.
(4) Communication method in a conventional computer system
Fourthly, a description will now be given of a communication undertaken between the machines in a conventional computer system.
FIG. 5
is a diagram explaining communication system of a third conventional computer system. As shown in
FIG. 5
, the plurality of machines
10
,
20
and
40
and the like share the shared memory
50
. Communication between the machines via the shared memory
50
is executed such that an originating machine specifies a real machine No. of a destination machine. For example, assuming that the machine
10
has a real machine No.
0
and the machine
20
has a real machine No.
1
, the machine
10
requests communication with the machine
20
by specifying the real machine No.
1
. The machine
40
is provided with a plurality of logic machines
41
-
1
-
41
-n. It is possible for the logic machine
41
-
3
of the machine
40
to communicate with the machine
20
via an AVM
42
and the shared memory
50
, by specifying the real machine No.
1
of the machine
20
. In this way, communication among the machines
10
,
20
. . . via the shared memory
50
is possible by specifying the real machine No.
(5) Interruption handling in conventional communication
A description will now be given of interruption handling effected in conventional communication.
In the above-described system in which a plurality of machines share a shared memory, communication between virtual machines is possible using a GSIGP instruction. In order to keep track of how an interruption is pending or reflected (processed), communication process as shown in
FIG. 6
, which process is based on the pending status of an interruption, is conducted. GSIGP instructions have the function of allowing communication between machines and controlling remote machines. The function of controlling remote machines is taken advantage of when a downed machine is to be controlled. In this case, a GSIGP instruction is used to halt the operation of a CPU, reset the I/O and to begin a memory dump.
FIG. 6
is a sequence chart explaining interruption handling in conventional communication.
It is assumed that the machine A communicates with the machine B.
step
1
) The machine A issues a GSIGP instruction for requesting communication to the machine B via
Hiraishi Toshinori
Hiraoka Katsunori
Horizaki Koshi
Murase Hitoshi
Ochiai Yumi
Fujitsu Limited
Lao Sue
Staas & Halsey , LLP
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