Data processing: software development – installation – and managem – Software upgrading or updating – Including multiple files
Reexamination Certificate
1999-03-30
2003-07-01
Morse, Gregory (Department: 2122)
Data processing: software development, installation, and managem
Software upgrading or updating
Including multiple files
C717S168000, C714S764000, C714S768000
Reexamination Certificate
active
06588010
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of modifying a program stored in a nonerasable ROM (read-only memory) and executing the modified program for use in computer systems.
BACKGROUND OF THE INVENTION
Computer systems generally comprise a microcomputer serving as the main component, and an external device connected to the microcomputer. The microcomputer consists essentially of memory means for storing programs and data, a CPU (central processing unit) for reading the program and data from the memory means, executing the program and processing the data, and an interface (I/F) circuit for providing communications with the external device.
The memory means comprises a ROM having stored therein the basic program and basic data indispensable to the operation of the computer system and to be executed or processed, for example, upon a start-up, and a RAM (random access memory) for storing various programs and various kinds of data. A nonerasable masked ROM is usually used as the ROM, which therefore has the problem that the basic program and basic data stored in the masked ROM can not be modified.
The following methods are available of modifying the basic program and basic data to solve this problem. An erasable nonvolatile external memory device, such as EEPROM, is connected to the microcomputer, with a modified basic program and modified basic data stored in the device. When executing the basic program and processing the basic data, the microcomputer lets the modified basic program and the modified basic data be transferred from the external memory device to the RAM for execution or processing.
This method is effective when the basic program to be modified contains a small quantity of data. However, when a basic program containing a large quantity of data is to be modified, the basic program occupies an excessively great region of the RAM to impair the processing ability of the microcomputer.
As another method of modifying the basic program, the external memory device has stored therein modification program data (hereinafter referred to as the “modification program”) for modifying a portion of program data contained in the basic program. Before executing the basic program, the microcomputer transfers the modification program from the external memory device to the RAM, and when executing the portion to be modified of the basic program, the microcomputer executes the modification program, with the result that the basic program is executed as modified.
With this method, the modification program, which corresponds to a portion of the basic program, is transferred to the RAM and is therefore unlikely to occupy an excessive region. In the case of this method, the microcomputer has stored therein a modifying address indicating the location where the data contained in the basic program is to be modified, and a RAM address where the data of the modification program to be substituted at the modifying address is stored. When executing the basic program, the microcomputer needs to modify the basic program always with reference to the modifying address and the RAM address. This impairs the processing ability of the microcomputer.
JP-A No. 143316/1993 discloses a method of partially modifying programs, which is another method of modifying the basic program.
FIG. 11
shows the interior construction of a microcomputer for use in practicing this method. As illustrated, the microcomputer
90
has a CPU
91
, masked ROM
92
, RAM
93
and I/F circuit
98
which are previously mentioned, and further comprises a modification program memory
95
for storing a modification program and an address storage
95
for storing a modifying address. The microcomputer further includes a change-over circuit
97
which upon receiving the modifying address from the storage
96
, changes over the basic program from the masked ROM to the modification program from the memory
95
and transmits the modification program to the CPU
91
. The devices
91
,
92
,
93
,
95
,
96
,
97
,
98
are connected by a bus
94
.
When the CPU
91
reads the basic program from the masked ROM
92
for execution and if an address of the basic program to be read by the CPU
91
matches the modifying address, the change-over circuit
97
transmits the modification program from the memory
95
to the CPU
91
, whereby the basic program is modified.
This method realizes the modification of the basic program by hardware and therefore entails no delay in executing the basic program, permitting the microcomputer
90
to exhibits its processing ability without impairment. However, the method requires the addition of the modification program memory
95
, modifying address storage
96
and change-over circuit
97
to the microcomputer
90
, rendering the computer
90
greater in size.
The present inventor has devised the following means for solving the foregoing problems encountered in modifying the basic program, directing attention to the address interrupt function provided for CPUs. This function is such that when the CPU specifies a predetermined address, an interrupt is processed. Presently many CPUs have this interrupt function.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a computer system wherein the basic program can be modified without making the microcomputer incorporated therein large-sized and without impairing the processing ability of the microcomputer.
The present invention provides a computer system comprising a microcomputer and external memory means in communication with the microcomputer for storing various programs and various items of data, the microcomputer comprising a nonerasable ROM having stored therein a basic program and basic data for controlling the operation of the computer system, a RAM for storing various programs or various kinds of data, a CPU for executing programs and processing data, and an interface circuit for providing communications with external devices. The external memory means has stored therein a modification program for modifying a portion of program data contained in the basic program, and a modification starting address indicating a location in the basic program where the modification of the basic program by the modification program is to be started. The CPU has an address interrupt function for processing an interrupt at a predetermined interrupt address.
In the computer system thus constructed, the microcomputer transfers the modification program from the external memory means to the RAM and stores the modification starting address in the CPU as the interrupt address. When an address interrupt occurs upon the CPU specifying the modification starting address during the execution of the basic program, the CPU processes the interrupt by causing the basic program to jump to the head address of the modification program in the RAM, and executes the modification program. Consequently, the basic program is modified by the modification program.
The present invention only utilizes a CPU having an address interrupt function, has no need to add another device to the microcomputer for modifying the basic program and accordingly involves no likelihood of making the microcomputer greater in size.
Since the basic program is modified by processing an address interrupt, there is no need for the CPU to refer to the modifying address at all times, consequently precluding impairment of the microcomputer processing ability.
REFERENCES:
patent: 4542453 (1985-09-01), Patrick et al.
patent: 5367658 (1994-11-01), Spear et al.
patent: 5471045 (1995-11-01), Geronimi
patent: 5542081 (1996-07-01), Geronimi
patent: 0 092 646 (1983-11-01), None
patent: WO-98/57255 (1998-12-01), None
patent: 03 269726 (1991-12-01), None
patent: 04090032 (1992-03-01), None
patent: 05143316 (1993-06-01), None
patent: 06-342412 (1994-12-01), None
patent: 07-084775 (1995-03-01), None
Breternitz Jr. et al., “Enhanced Compression Techniques to Simplify Program Decompression and Execution”, IEEE, pp. 170-176, Oct. 1997.*
Momodomi et al., “A 4Mb NAND EEPROM with Tight programmed Vt distributio
Armstrong Westerman & Hattori, LLP
Morse Gregory
Sanyo Electric Co,. Ltd.
Vo Ted T.
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