Electrical computers and digital processing systems: processing – Processing architecture
Patent
1995-03-03
2000-02-08
Myers, Paul R.
Electrical computers and digital processing systems: processing
Processing architecture
G06F 1500
Patent
active
060237511
ABSTRACT:
A computer system provides fast evaluation of predicates and Boolean expressions with a set of operations for determining a value in a specified register from a plurality of inputs. The execution of each operation is defined by two functions of the operation's inputs: a result function which yields a result value, and an enable function which determines whether the result value is written to the specified register. To evaluate a Boolean expression with the operations, the register is preset to a Boolean value, e.g. one for an AND reduction, zero for an OR reduction. The operations can then write a Boolean value, e.g. zero for an AND reduction, one for an OR reduction, to the register if each operation's enable function evaluates true. The register then stores the correct value of the expression. The expression's value can be used as predicates to conditionally execute operations in a program. Preferably, the operations are executed in parallel by plural functional units, and the register is capable of accepting multiple values written simultaneously, so long as they are identical.
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Kathail Vinod
Rau B. Ramakrishna
Schlansker Michael
Hewlett--Packard Company
Myers Paul R.
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