Computer-simulation technique for numerical analysis of semicond

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364488, G06F 1500

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active

051034158

ABSTRACT:
A method of computing an internal potential distribution of a semiconductor device is disclosed which includes an electrically floating semiconductor layer as a floating potential region, thereby evaluating the breakdown voltage characteristic of the device by means of simulation. According to this method, when a trial value of a quasi-Fermi potential of the semiconductor layer is given, a Poisson equation is solved with use of the trial value, thus finding the potential distribution of the device. A characteristic point is obtained from the potential distribution. It is determined whether or not the relationship between the characteristic point and the trial value satisfies a specific relational expression. If the specific relational expression is satisfied, the trial value is determined to be the quasi-Fermi potential of the semiconductor layer, and the solution of the Poisson equation is output as a simulation calculation result. If the specific relational expression is satisfied, the trial value is corrected, and the Poisson equation is solved once again with use of the corrected trial value. This process is repeated until the specific relational expression is satisfied.

REFERENCES:
patent: 4920400 (1990-04-01), Barsony
patent: 4968932 (1990-11-01), Baba et al.
M. S. Adler et al., "Theory and Breakdown Voltage for Planar Devices with a Single Field Limiting Ring," IEEE Trans. Electric Devices, ED-24, pp. 107-113, Feb. 1977.
S. Yasuda et al., "High-Voltage Planar Junction with a Field-Limiting Ring," Solid-State Electron, vol. 25, No. 5, pp. 423-427, 1982.

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