Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate
1998-11-30
2001-09-04
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
Reexamination Certificate
active
06285970
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process simulation method using a computer system applicable to semiconductor device fabrication and more particularly, to a computer simulation method of oxidation of silicon (Si), in which the diffusion equation of oxidant is solved to find the surface concentration of the oxidant at the interface between a Si region and a silicon dioxide (SiO
2
) region.
2. Description of the Prior Art
A process simulator is a computer system to simulate various processes in the semiconductor device fabrication, such as oxidation, diffusion, etching, and ion-implantation, thereby predicting the details of the resulting device structure, such as profiles of doped impurities and topography of conductive or dielectric materials. If the device structure of a Large-Scale Integrated circuit (LSI) is optimized by the use of the process simulator in such a way that the LSI exhibits the desired electrical characteristics, the developmental cost and period for the LSI can be drastically reduced compared with the case where the LSI is actually fabricated for the purpose of experiments.
Conventionally, the process simulator designed for semiconductor device fabrication is equipped with built-in simulation models applicable to the individual fabrication processes. For example, a simulation model of the time-dependent thickness of an oxide region is disclosed in a book entitled “Simulation for design and fabrication of VLSIs”, on pp. 51-63, edited by M. Morisue and published by the CMC corporation in 1987. In this model, the following Deal-Grove equation is used.
ⅆ
T
ox
ⅆ
t
=
B
2
T
ox
old
+
A
(
1
)
In the equation (1), t is the time, T
ox
is the thickness of the oxide region at the present time, T
ox
old
is the thickness of the oxide region at the prior time, and A and B are parameters relating to the oxidation rate of a region to be oxidized.
On the other hand, individual electronic elements and/or components need to be electrically isolated in the LSI. This electrical isolation is usually realized by the selective oxidation method termed the “LOCal Oxidation of Silicon (LOCOS)” using a silicon nitride film formed on the surface of a semiconductor substrate as an oxidation mask, or the trench isolation method using trenches formed at the surface of a semiconductor substrate and filled with a dielectric.
In recent years, as the integration level of the electronic elements and components in the LSI has increased, the electronic elements and components have been miniaturized more and more. Under such the circumstances, there has been the need to simulate the isolation process for realizing the electrical isolation using the selective oxidation or trench isolation method. Also, several two-dimensional simulation methods of the isolation process have been developed.
An example of the conventional simulation methods of the isolation process using the LOCOS method is disclosed in a book entitled “Simulation Techniques of semiconductor devices and processes”, on pp. 79-89, edited by K. Taniguchi and published by the Realize Incorporated in 1990. This method is explained below with reference to FIG.
1
.
FIG. 1
shows the flowchart of the conventional simulation method for the LOCOS method disclosed in the Taniguchi's book.
In the step
101
, desired nodes are configured onto a whole simulation zone where a SiO
2
region is formed in contact with a Si region, and at the same time, the predetermined initial condition are applied to the individual nodes for setting the initial data. Also, the value of the time t is set as zero, i.e., t=0.
As seen from this description, it is assumed that the SiO
2
region initially exists in contact with the Si region prior to the start of the oxidation process. In an actual oxidation process of Si, the surface of a single-crystal Si substrate is usually covered with a native SiO
2
film prior to the oxidation process. Therefore, the SiO
2
region is assumed to be contacted with the Si region at the start of oxidation.
In the step
102
, the value of a preset time increment &Dgr;t is added to the present value (i.e., 0) of the time t. Thus, a first one of the time steps is started.
In the step
103
, the following diffusion equation (2) (i.e., the Laplace's equation) of oxidant is constituted in the SiO
2
region, where C
ox
is the concentration of the oxidant and D
ox
is the diffusion coefficient of the oxidant. This is because the oxidant existing in the oxidizing atmosphere is diffused through the SiO
2
region to the opposing surface of the Si region.
D
ox
•∇
2
C
ox
=0 (2)
Then, the diffusion equation (2) is discretely solved at the individual nodes, thereby finding the surface concentration C
ox
surf
of the oxidant at the interface between the Si and SiO
2
regions (i.e., the Si/SiO
2
interface) in the first time step.
Subsequently, in the step
104
, using the surface concentration C
ox
surf
of the oxidant thus found, the oxidation rate (dT
ox
/dt) of the Si region, which is given by the time-dependent thickness T
ox
of the SiO
2
region, in the first time step is calculated at the individual nodes by the use of the following equation (3)
ⅆ
T
ox
ⅆ
t
=
K
·
C
ox
surf
(
3
)
where K is a coefficient of the oxidation reaction. The orientation of the oxidation rate (dT
ox
/dt) of the Si region is set in a direction perpendicular to the Si/SiO
2
interface.
The equation (3) means that the oxidation rate of the Si region, i.e., the time-dependent thickness (dT
ox
/dt) of the SiO
2
region, is proportional to the surface concentration C
ox
surf
of the oxidant at the Si/SiO
2
interface is assumed in this conventional simulation method.
In the step
105
, a new or post-oxidation position of the Si/SiO
2
interface is calculated by multiplying the value of the oxidation rate (dT
ox
/dt) at the Si/SiO
2
interface thus found in the step
104
by the value of the time increment &Dgr;t at the individual nodes.
In the step
106
, using the new or post-oxidation position of the Si/SiO
2
interface thus found in the step
105
, the shape or geometric deformation of the Si and SiO
2
regions due to oxidation in the first time step is calculated.
In the step
107
, it is judged whether the present value of the time t in the fist time step is equal to the value of the end time t
END
or not. If the answer is “NO”, the second time step is started and the steps
102
to
106
are performed again. Further, in the same way as above, the steps
102
to
106
are repeated in the third time step and later time steps until the answer of “YES” is given. If the answer is “YES”, the flow of the steps
102
to
106
is stopped.
FIGS. 2A
to
2
C schematically show the one-dimensional, time-dependent shape change of Si and SiO
2
regions in an oxidation process, to which the above-described conventional simulation method shown in
FIG. 1
is applied.
At the time t
0
, as shown in
FIG. 2A
, nodes P
1
, P
2
, P
3
, P
4
, and P
5
are configured one-dimensionally along an interface L
0
between Si and SiO
2
regions
151
and
152
. The nodes P
1
, P
2
, P
3
, P
4
, and P
5
are equally spaced along the Si/SiO
2
interface L
0
. This is performed in the step
101
in FIG.
1
.
Although not shown in
FIGS. 2A
to
2
C, it is needless to say that other nodes are configured two-dimensionally on the whole Si and SiO
2
regions
151
and
152
.
At the time t
1
after the specific time increment &Dgr;t from the time t
0
(or, in the first time step), as shown in
FIG. 2B
, the nodes P
1
, P
2
, P
3
, P
4
, and P
5
are shifted perpendicular to the Si/SiO
2
interface L
0
toward the Si region
151
. Thus, the nodes P
1
, P
2
, P
3
, P
4
, and P
5
and the Si/SiO
2
interface L
0
are moved to their new positions, resulting in new nodes P
1
′, P
2
′, P
3
′, P
4
′, and P
5
′ and a new Si/SiO
2
interface L
1
. This movement is carried out by the use of the new or post-oxidation position of the Si/SiO
2
interface L
0
Jones Hugh
McGinn & Gibb PLLC
NEC Corporation
Teska Kevin J.
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