Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2000-10-12
2003-04-22
Broda, Samuel (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S002000, C703S004000
Reexamination Certificate
active
06553340
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a computer simulation method for the electrical characteristics of semiconductor devices and, more particularly, to a numerical simulation method for the transient response characteristics of junction capacitance.
2. Description of the Related Art
According to a conventional computer simulation method for the electrical characteristics of semiconductor devices, as described in Ryo Dan, ed., “Techniques for Process Device Simulations”, pp. 91-134, the region to be analyzed is divided into a mesh pattern, and the Poisson equation, electron current continuity equation, and hole current continuity equation are discretized at the respective mesh points. Further, these equations are linearized to obtain simultaneous linear equations by, e.g., the Newton method. These simultaneous linear equations are calculated to obtain solutions.
In addition to this general device simulation, there are methods of calculating PN junction capacitance and Schottky junction capacitance in a device by a numerical simulation, such as small-AC-signal analysis described in, e.g., Section “Sinusoidal Steady-State Analysis (S
3
A) ”, p. 2,032 in Steven E. Laux, “Techniques for Small-Signal Analysis of Semiconductor Devices”, IEEE Trans. Electron Devices, Vol. 32, No. 10, pp. 2,028-2,037. This analysis will be explained briefly. In the small-AC-signal analysis, junction capacitance or the like is calculated to obtain a DC solution at a desired operating point. More specifically, equations (1) to (3) below are equivalent to equations (3.41)-(3.43) in “Techniques for Process Device Simulations”, pp. 105-106 cited earlier:
F
(&psgr;,
n,p
)=0 (1)
G
(&psgr;,
n,p
)=0 (2)
H
(&psgr;,
n,p
)=0 (3)
where
F
(&psgr;,
n,p
)=∇(&egr;·∇&psgr;)+
q
(
p−n+N
D
−N
A
) (4)
G
(
ψ
,
n
,
p
)
=
∂
n
∂
t
+
G
0
(
ψ
,
n
,
p
)
(
5
)
G
0
(&psgr;,
n,p
)=∇(&mgr;
n
n∇&psgr;−D
n
∇n
)−
GR
(
n,p
) (6)
H
(
ψ
,
n
,
p
)
=
∂
p
∂
t
+
H
0
(
ψ
,
n
,
p
)
(
7
)
H
0
(&psgr;,
n,p
)=−∇(&mgr;
p
p∇&psgr;+D
p
∇p
)−
GR
(
n,p
) (8)
are solved for
∂
n
∂
t
=
0
(
9
)
∂
p
∂
t
=
0
(
10
)
to calculate the potential, electron density, and hole density by
&xgr;
0
=(&psgr;
0
,n
0
,p
0
) (11)
where &psgr; is the electrostatic potential, n is the electron density, p is the hole density, &egr; is the permittivity, q is the unit charge, N
D
is the donor density, N
A
is the acceptor density, &mgr;
n
and &mgr;
p
are the electron and hole mobilities, D
n
and D
p
are the electron and hole diffusion constants, and GR is the generation/recombination term of an electron/hole. Assume that a small AC bias with an angular frequency &ohgr; and an amplitude {tilde over (V)} is superposed on a DC bias V at the operating point, and the potential, electron density, and hole density in this state respond in a manner given by
&xgr;=&xgr;
0
+{tilde over (&xgr;)} exp
j&ohgr;t
(12)
{tilde over (&xgr;)}=({tilde over (&psgr;)},ñ,{tilde over (p)}) (13)
Substituting the response in equation (12) into equations (1) to (8) and Taylor-expanding each term using
∥{tilde over (&xgr;)}∥<∥&xgr;
0
&xgr;
and
F
(&psgr;
0
,n
0
,p
0
)=0 (14)
G
0
(&psgr;
0
,n
0
,p
0
)=0 (15)
H
0
(&psgr;
0
,n
0
,p
0
)=0 (16)
yields equations (17) below equivalent to equation (10) in “Techniques for Small-Signal Analysis of Semiconductor Devices”, p. 2,032
(
∂
F
∂
ψ
∂
F
∂
n
∂
F
∂
p
∂
G
0
∂
ψ
j
ω
t
+
∂
G
0
∂
n
∂
G
0
∂
p
∂
H
0
∂
ψ
∂
H
0
∂
n
j
ω
t
+
∂
H
0
∂
p
)
(
ψ
~
n
~
p
~
)
=
(
V
~
0
0
)
(
17
)
By solving equation (17), the complex amplitude {tilde over (&xgr;)} of potential, electron density, and hole density is obtained. Assuming that each element of the coefficient matrix is an equivalent conductance, the conductance current component of a response AC current at a device electrode is obtained by the product of the equivalent conductance coupled to the device electrode and defined on a mesh branch, and the complex amplitude across the mesh points on the ends of the branch. By adding the displacement current component
ϵ
∂
(
∇
φ
)
∂
t
to the conductance current component, the total response AC current Ĩ is obtained. Using this, the capacitance component viewed from the device electrode is given by
C
=
I
~
ω
V
~
(
18
)
FIG. 1
is a flow chart showing the processing procedure of this method. In step
301
, a DC bias to be applied to a device is set. In step
302
, internal physical quantities such as potential, electron density, and hole density at the current operating point are calculated by steady-state analysis. In step
303
, the frequency of a small RF voltage to be applied to the device is set. In step
304
, a perturbation equation for a small RF AC component is solved to obtain the complex amplitude of a small AC response component of the internal physical quantity. In step
305
, the small AC component of an electrode current is calculated from the complex amplitude obtained in step
304
, and the junction capacitance viewed from the electrode is calculated using the result. Instep
306
, whether AC analysis is complete for all frequencies set in advance is checked. In step
307
, whether analysis is complete for all DC bias voltages set in advance is checked.
The above description concerns simulation for junction capacitance in a steady state. In addition, there is an experimental method of measuring transient changes in junction capacitance, such as DLTS described in, e.g., Takashi Katoda, ed., “Evaluation Techniques for Semiconductors”, pp. 245-247. According to this method, after a step voltage pulse is applied to a device electrode, a small RF voltage of about 1 MHz is applied to the device, and the phase difference with an RF current flowing at that time is continuously observed to measure temporal changes in junction capacitance. No concrete conventional technique has been proposed about this experimental numerical simulation. However, transient changes in capacitance can be numerically simulated by applying the Fourier analysis of transient analysis results which is described in Section “Fourier Decomposition of Transient Excitations (FD)”, pp. 2,029-2,030 in Steven E. Laux, “Techniques for Small-Signal Analysis of Semiconductor Devices”, IEEE Trans. Electron Devices, Vol. 32, No. 10, pp. 2,028-2,037. More specifically, similar to an actual experiment, an input waveform prepared by superposing a step voltage pulse on a small RF voltage is applied to a device electrode, and transient changes in capacitance are calculated using the transient response current waveform by transient analysis of the device simulation. In transient analysis, an equation describing changes in charged state of a deep impurity level that cause transient changes in junction capacitance is added to equations (1) to (7). These equations are discretized including the time differential terms. The response waveform is divided by time windows using the reciprocal of the frequency of the small RF voltage. Fourier analysis is performed in each window to obtain the average capacitance component in each window. The average capacitance components are combined to obtain final temporal changes in capacitance.
FIG. 2
is a schematic view showing the outline of this method.
FIG. 2
schematically shows the case wherein a voltage waveform
402
prepared by superposing a sma
Broda Samuel
NEC Electronics Corporation
Young & Thompson
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