Computer memory system providing parity with standard non-parity

Details Computer memory system providing parity with standard non-parity Computer memory system providing parity with standard non-parity

1997-08-27

1999-06-22

Chung, Phung M.

Excavating

371 491, G06F 1110, H03M 1300

Patent

active

059149701

ABSTRACT:
A memory system uses standard memory devices not normally supporting parity bits. Parity bits for multiple memory devices are stored in a dedicated parity device shared among multiple memory devices. Inadvertent erasure of the parity information, when writing to a single memory device, is prevented by a prereading of the parity device prior to a writing to the single memory device. Special circuitry stores the preread parity information and merges it back with the calculated parity bit for the written data to preserve complete parity information.

REFERENCES:
patent: 5485572 (1996-01-01), Overley

Affiliated with

Also associated with

Rating

Computer memory system providing parity with standard non-parity does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer memory system providing parity with standard non-parity, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer memory system providing parity with standard non-parity will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1713017