Computer memory product with preemptive multithreading software

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G06F 946

Patent

active

056946031

ABSTRACT:
A multithreading computer system for the preemptive asynchronous concurrent execution of a plurality of instruction threads of a multithreaded application program. As an illustrative example of one of the many uses of the invention, the disclosed application program comprises a compiler thread and an editor thread. The compiler processes the source code while the programmer edits the source code at the keyboard. An interrupt sevice routine repeatedly activates the editor thread to provide a preemptive asynchronous editing process for either entry of new source code or modification of the previously entered code, while the compiler thread concurrently processes the source code during the time intervals between keystrokes. The interrupt service routine may be activated either by a keyboard interrupt or periodically by a clock at predetermined time intervals.

REFERENCES:
patent: 3614745 (1971-10-01), Poduin
patent: 4084228 (1978-04-01), Dufond et al.
patent: 4383307 (1983-05-01), Gibson, III
patent: 4513391 (1985-04-01), Maddock
patent: 4671684 (1987-06-01), Kojima et al.
patent: 4724285 (1988-02-01), Lefler et al.
patent: 4773009 (1988-09-01), Kucera et al.
patent: 4887212 (1989-12-01), Zamora et al.
Hiromoto, Robert, Parallel-processing a large scientific problem, AFIPS Press. 1981, pp. 235-237.
Ousterhout, John K., Scheduling techniques for Concurrent Systems, IEEE, 1982, pp. 22-30.
Andrews, Gregory R., Synchronizing Resources, ACM Transactions on Programming Languages and Systems, vol. 3, No. 4, Oct. 1981, pp. 405-430.
Collin, A. J. T., The Implementation of STAB-1, Software--Practice and Experience, vol. 2, 1972, pp. 137-142.
Artym, Richard, The STAB Multiprocessing Environment for CYBA-M, Software--Practice and Experience, vol. 12, 1982, pp. 323-329.
Treleaven et al., Combining Data Flow and Control Flow Computing, The Computer Journal, vol. 25, No. 2, 1982, pp. 207-217.
Duffie, C. A. III, Task Scheduling Algorithm for a Teleprocessing Communications Controller, IBM Technical Disclosure Bulletin, vol. 16, No. 10, Marcy 1974, pp. 3349-3352.
Hoare, C. A. R., Towards a Theory of Parallel Programming, Operating Systems Techniques, Proceedings of a Seminar held at Queen's University, Belfast, 1972, Aademic Press, 1972, pp. 61-71.
Cheriton, David Ross, Multi-Process Structuring and the Thoath Operating System, Doctoral Thesis, University of Waterloo, 1978.
Redell et al., Pilot: An Operating System for a Personal Computer, Communications of the ACM, Feb. 1980, vol. 23, No. 2, pp. 81-92.
Lampson et al., Experience with Processes and Monitors in Mesa, Communications of the ACM, Feb. 1980, vol. 23, No. 2, pp. 105-117.
Hughes, Lawrence, E., "System Programming Under CP/M-80," 1983, pp. 109-112 and 127-138.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Computer memory product with preemptive multithreading software does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer memory product with preemptive multithreading software, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer memory product with preemptive multithreading software will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-810227

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.