Computer interface

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G06F 300

Patent

active

044714580

ABSTRACT:
An interface (10) between a first (MC, 30) and second (SC) computer employs a multiplexer (46) and a coupler (48, 50). The first (MC, 30) and second (SC) computers have a first (LA/B, LEX0-15) and second (CX1-21, CA1-15) plurality of information lines, respectively. These computers also each have a group of control lines (36, 42). The multiplexer (46) is connected to the first and second plurality of information lines (LA/B, LEX0-15, CX1-21, CA1-15). The multiplexer (46) is operable to separately switch each of a predetermined group (LEX12-15) within the first plurality (LA/B, LEX0-15) between either member of a different corresponding pair within the second plurality (CX1-21, CA1-15). The multiplexer (46) is also connected to at least one (ESELCX) of the control lines (36) of the first computer (MC, 30). The multiplexer (46) can switch the predetermined group (LEX12-15) in response to a signal on the control lines (ESELCX) of the first computer (MC, 30). The coupler (48, 50) is connected to a given assemblage (CX1-20) within the second plurality (CX1-21, CA1-15) and to a predetermined set (LBIN1-15, LAIN12-15) within the first plurality (LA/B, LEX0-15). The coupler (48, 50) is operable to transmit signals to the second plurality (CX1-21, CA1-15) from the predetermined set (LBIN1-15, LAIN12-15).

REFERENCES:
patent: 3581286 (1971-05-01), Beausoleil
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
Microprocessors/Microcomputers: an Introduction; Givone, Donald, McGraw Hill Book Co., New York, 1980.
Fujitsu Scientific & Technical Journal, vol. 15, No. 4, Dec. 1979, Japan, "GP-1B Interface Adaptor Using a Microprocessor (MB8871)," T. Kasahara, T. Kouno and T. Nakagami, pp. 45-57.
IEEE Transactions on Instrumentation and Measurement, vol. 1M-29, No. 2, Jun. 1980, "The Design and Construction of a General Purpose Lab. Data Acquisition System," D. A. Lowther, C. B. Giles, I. C. Leszkowicz.
MC 6801 Reference Manual, 1st Ed., Motorola, 1980, pp. Ch1: 1,2,5; Ch3: 37-46.
Intel the 8086 Family User's Manual, Intel, 1979, (9800722-03), pp. Ch1: 1-11, Ch2: 1-6, Ch3: 1-14, Ch4: 38-52, pp. Appendix A: 4-17.

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