Computer instruction control apparatus and method

Boots – shoes – and leggings

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G06F 900

Patent

active

040400310

ABSTRACT:
The disclosure describes a data processing system including a program memory for storing a first instruction at a first address and a second instruction at a second address. The system includes a look-ahead feature in which the second instruction is stored in a buffer register while the first instruction is being stored in an execution register and is simultaneously being executed. A gate circuit controls the transmission of data between the buffer register and the execution register. If a third instruction having a third address is read into the program memory while the first instruction is being executed, the second and third addresses are compared. If the second and third addresses are identical, the gate circuit is inhibited and the second instruction is prevented from being transmitted to the execution register. Instead, the third instruction or a portion thereof, is transmitted to the buffer and execution registers, so that the third instruction is executed in place of the second instruction.

REFERENCES:
patent: 3553655 (1971-01-01), Anderson et al.
patent: 3559183 (1971-01-01), Sussenguth
patent: 3577190 (1971-05-01), Cocke et al.
patent: 3644900 (1972-02-01), Mizoguchi
patent: 3736567 (1973-05-01), Lotan et al.
patent: 3766527 (1973-10-01), Briley

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