Computer implemented method for designing a semiconductor...

Details Computer implemented method for designing a semiconductor... Computer implemented method for designing a semiconductor...

2005-06-06

2010-12-28

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S773000, C257SE23011, C438S622000, C438S637000

Reexamination Certificate

active

07859111

ABSTRACT:
A computer implemented method for designing a semiconductor device, comprising: creating a double cut via including: placing a first line pattern on a chip area, placing a second line pattern on an upper layer of the first line pattern, allocating a first via pattern on an intersection of the first and second line patterns, creating a protrusion line pattern; and allocating a second via pattern on an end of the protrusion line pattern; storing the double cut via; and extracting a single cut via provided on the chip area and replacing the single cut via with the double cut via.

REFERENCES:
patent: 5798937 (1998-08-01), Bracha et al.
patent: 6747349 (2004-06-01), Al-Dabagh et al.
patent: 2003/0005399 (2003-01-01), Igarashi et al.
patent: 11-031787 (1999-02-01), None

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