Computer implemented method for compressing 24 bit pixels to 16

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382233, 382235, 395102, 395109, 395112, G06F 700, G06F 1500

Patent

active

056216742

ABSTRACT:
A computer implemented method for compressing bit formats provided in a first packed data sequence. One embodiment of the method comprises the steps of generating, in response to executing a first instruction, a second packed data sequence by copying the first packed data sequence. A second step of masking, in response to executing a second instruction, a portion of the first packed data sequence. A third step of shifting data elements of the first packed data sequence, in response to executing a third instruction, wherein the data elements are independently shifted by separate shift counts. A fourth step of masking, in response to executing a fourth instruction, a portion of the second packed data sequence. A fifth step of generating, in response to executing a fifth instruction, a final result by joining the second and first packed data sequences.

REFERENCES:
patent: 4633483 (1986-12-01), Takahashi et al.
patent: 5218431 (1993-06-01), Gleicher et al.
patent: 5287420 (1994-02-01), Barrett
patent: 5446831 (1995-08-01), Yamashita et al.

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