Computer graphics system with low memory enhancement circuit

Details Computer graphics system with low memory enhancement circuit Computer graphics system with low memory enhancement circuit

1984-08-20

1987-06-30

Gruber, Felix D.

Boots, shoes, and leggings

364518, 340747, 340750, G09G 116, G06F 314

Patent

active

046775749

ABSTRACT:
Edge data is stored in a bit map, and clocked out pixel by pixel to form a pixel data stream for display. The edge data defines the regions or faces in the display image which have the same color. The face edges form transitions in the data stream (0-to-1 or 1-to-0), and are detected by an edge detector for generating sequential color addresses. The color data for each face is stored in a color memory in the order of appearance, and is accessed at each edge transition when a color change is required. The color address associated with each edge transition accesses the color for that face from the color memory. Each pixel in the display has a corresponding bit in the pixel map; and each color change in the display has a location in the color memory. The pixel data is sequentially accessed from the pixel memory by the pixel clock. The color data is sequentially accessed by the pixel transitions and synchronized into the display at each face edge.

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patent: 4439762 (1984-03-01), Van Vliet et al.
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patent: 4484188 (1984-11-01), Ott
patent: 4500875 (1985-02-01), Schmitz
patent: 4551768 (1985-11-01), Tsuchiya et al.

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