Patent
1995-01-10
1997-01-28
Jankus, Almis R.
395126, G06T 1100
Patent
active
055985173
ABSTRACT:
A geometric processor provides object primitives, as triangles, in graphic display image space to support a dynamic display. The image space is defined by pixels, in turn specified in arrays as spans. In a multi-level scanning operation, primitives are scanned at a first level to locate lapped spans that are lapped by primitives. At a second level, spans are scanned to process pixels that are lapped by primitives. An alternative embodiment discloses three-level scanning in association with parallel pixel processing. Concurrent texturing structure operates along with cache memories.
REFERENCES:
patent: 5363475 (1994-11-01), Baker et al.
Rambus Architectural Overview, pp. 1-24, 1992, 1993 Mountainview, CA.
Deering, M. F. et al., FBRAM: A New Form of Memory Optimized for 3D Graphics, pp. 167-174, 1994 Mountainview, CA.
Pineda, J., A Parallel Algorithm for Polygon Rasterization, pp. 17-20, 1988, Chelmsford, MA.
Whitton, M. C., Memory Design for Raster Graphics Display, pp. 48-65, 1984.
Apgar, B. et al., A Display System for the Stellar Graphics Supercomputer Model GS1000, pp. 255-262, 1988, Newton, MA.
Evans & Sutherland Computer Corp.
Jankus Almis R.
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