Computer employing reduction language

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G06F 738

Patent

active

040756890

ABSTRACT:
A computer including a control unit, an arithmetic-logic unit, an input unit, an output unit, a memory unit, and circuitry interconnecting the units for transmitting, processing and storing sequences of characters, the memory unit is constituted by a plurality of stack registers each having a large storage capacity for storing expressions in the form of strings of characters, and the control unit constitutes a reduction processor operatively associated with the stack registers for determining the reducibility, by means of a lambda reduction language, of the expressions stored in the stack registers and for executing any required reductions.

REFERENCES:
patent: 3343135 (1967-09-01), Freiman et al.
patent: 3349375 (1967-10-01), Seeber et al.
patent: 3737864 (1973-06-01), Werner

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