Computer display controller with reconfigurable frame buffer mem

Details Computer display controller with reconfigurable frame buffer mem Computer display controller with reconfigurable frame buffer mem

1988-12-09

1991-10-29

Herndon, Heather R.

Boots, shoes, and leggings

340799, G06F 1562

Patent

active

050620576

ABSTRACT:
A computer display controller (50) cooperates with a host microprocessor (18) to direct display data to a frame buffer memory (16) in accordance with a selected one of multiple frame buffer memory configurations (20 and 30). The display controller includes an address decoder circuit (58) that delivers address information generated by the host microprocessor to the address inputs (64) of the frame buffer memory in accordance with the selected frame buffer memory configuration.

REFERENCES:
patent: 4823286 (1989-04-01), Lumelsky et al.
patent: 4845640 (1989-07-01), Ballard et al.
patent: 4920504 (1990-04-01), Sawada et al.
patent: 4958302 (1990-09-01), Fredrickson

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