Computer disk drive integrated data path circuit optimized for h

Details Computer disk drive integrated data path circuit optimized for h Computer disk drive integrated data path circuit optimized for h

1993-01-29

1995-10-31

Psitos, Aristotelis

Dynamic information storage or retrieval

Control of storage or retrieval operation by a control...

Mechanism control by the control signal

369124, 360 61, 360 65, 360 67, G11B 2012

Patent

active

054636035

ABSTRACT:
An integrated circuit adapted for use in a data path of a disk storage system of a type wherein data is recorded at different rates depending upon the storage track of the data and includes servo bursts of head positioning signals disbursed throughout the data on all of the tracks. The circuit includes a variable cut off low pass filter that is adjusted both for the rate of data being read and for the rate of the servo bursts when being read. An automatic gain control and a pulse detector are similarly dynamically adjusted in characteristics to fit that of the data and servo bursts when each is being read from the disk. An output of the filter provides both read data and head positioning signals. A write data path is also provided as part of the circuit.

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AT&T Data Sheet, "ATT91C010 Low Power Reach 1 Device," dated Apr. 1991.
Kovacs et al., "A 32Mb/s Fully Integrated Read Channel for Disk Drive Applications," 1992 IEEE International Solid State Circuits Conference, pp. 62, 63, and 243.
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Wile et al., "Pulse detector chip keeps hard-disk drives virtually error-free", Electronic Design, vol. 33, pp. 121-128 (Aug. 1985).
Article entitled: "Switchable time-domain filter", IBM Technical Disclosure Bulletin, vol. 29, pp. 1231-1232 (Aug. 1986).

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