Computer architecture for the deferral of exceptions on speculat

Details Computer architecture for the deferral of exceptions on speculat Computer architecture for the deferral of exceptions on speculat

1997-10-13

1999-06-22

Treat, William M.

395591, G06F 938

Patent

active

059151170

ABSTRACT:
The inventive system and method allows for software control of hardware drral of exceptions in speculative operations, and comprises three components. The first component is processor stored information which reflects the code generation strategy of applications and is used by hardware and the operating system to control exception deferral. The second component is processor stored information set by the operating system to specify to hardware which type of faults should be automatically deferred. The third component is further processor stored information which indicates to the hardware to defer certain exception causing aspects of the speculative operation, while performing other non excepting aspects of the speculative operation. The stored information is set after the operating system exception handler has unsuccessfully attempted fault resolution.

REFERENCES:
patent: 5438677 (1995-08-01), Adams et al.
patent: 5634023 (1997-05-01), Adler et al.
patent: 5778219 (1998-07-01), Amerson et al.
patent: 5794029 (1998-08-01), Babaian et al.

Affiliated with

Also associated with

Rating

Computer architecture for the deferral of exceptions on speculat does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer architecture for the deferral of exceptions on speculat, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer architecture for the deferral of exceptions on speculat will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1714466