Computer architecture for the concurrent execution of sequential

Details Computer architecture for the concurrent execution of sequential Computer architecture for the concurrent execution of sequential

1989-07-28

1993-03-23

Kriess, Kevin A.

Boots, shoes, and leggings

364DIG1, 364224, 3642679, 36424294, 36423222, G06F 930

Patent

active

051971372

ABSTRACT:
A computer system processes mixed control, indexing and data manipulation instructions in groups of N instructions at a time. A group of instructions is applied to a set of N Dispatch units which execute the control and indexing instructions directly. The Dispatch Units convert data manipulation instructions into a more primitive data flow operations. The data flow operations are applied to a set of M Execution Units which process the operations concurrently by observing data dependency constraints. The data used by the control and indexing instructions is stored in a group of identical memory structures which are accessible by each of the Dispatch Units. Data for the data manipulation instructions is stored in a data structure which is divided among the Execution Units.

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