Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing
Reexamination Certificate
2007-06-19
2007-06-19
Vaughn, William (Department: 2144)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
C709S238000
Reexamination Certificate
active
09816004
ABSTRACT:
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network. A system and method for creating a dedicated pipeline for processing streaming data also are provided.
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Asano Shigehiro
Hofstee Harm Peter
Hopkins Martin E.
Johns Charles Ray
Kahle James Allan
Kabushiki Kaisha Toshiba
Lerner David Littenberg Krumholz & Mentlik LLP
Maniwang Joseph
Sony Computer Entertainment Inc.
Vaughn William
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