Computer apparatus

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340347DD, G06F 500, G06F 300

Patent

active

042505488

ABSTRACT:
Computer apparatus in a word organized computer system for implementing a single computer instruction for moving a binary number stored in one of a plurality of addressable registers to a designated memory location in a word addressable memory. The binary number is divisible into a maximum of four characters with characters of a given number having either 8 or 9 bits, and a word has 36 bits divisible into four bytes. If the characters have 8 bits, the characters are reformatted so that there is one character per byte. If the characters have 9 bits, they are not reformatted since there is already only one character per byte. The bytes are then shifted so that the byte position containing the most significant character of the binary number occupies a designated byte position in a first word stored in a data out register ready to be read into memory for storage at the designated memory location. After the first word is stored in memory, and if the bytes containing characters of the binary number overflow a word boundary of the first word, bytes containing overflow characters are stored in a second word in the data out register ready for storage at a memory location contiguous to the designated memory location.

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patent: 4057847 (1977-11-01), Lowell et al.
patent: 4087853 (1978-05-01), Kashio
patent: 4099257 (1978-07-01), Arnold et al.
patent: 4141005 (1979-02-01), Bonner et al.

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