Computer-aided engineering

Details Computer-aided engineering Computer-aided engineering

1989-03-24

1992-05-05

Lall, Parshotam S.

Boots, shoes, and leggings

364488, G06F 1520

Patent

active

051114135

ABSTRACT:
A simulation system for circuit design is disclosed. The system couples a schematic editor and simulator to allow incremental changes to a design under test without requiring prior shutdown of the simulator. The system uses a method which permits a wide range of changes to the design and provides a resulting netlist for the changed design. Changes can be made to the schematic which include changes in hierarchy, addition or deletion of components (including hierarchical components), addition or deletion of signals at any level within the design hierarchy, addition or deletion of interconnections of components at any level of hierarchy within the design, addition and deletion of interface ports for any component type, substitution of a new component for an existing one (including swapping hierarchical and behavioral descriptions), and alteration of parametric data such as device delay timing. The simulation continues to run after design changes are made. The method may be used in conjunction with hardware modeling systems.

REFERENCES:
patent: T940013 (1975-11-01), Ho
patent: 4656603 (1987-04-01), Dunn
patent: 4725971 (1988-02-01), Doshi et al.
patent: 4763288 (1988-08-01), Deering et al.
patent: 4815003 (1989-03-01), Putatunda et al.
patent: 4827427 (1989-05-01), Hyduke
patent: 4827428 (1989-05-01), Dunlop et al.
patent: 4862460 (1989-08-01), Yamaguchi
patent: 4868785 (1989-09-01), Jordan et al.
patent: 4907180 (1990-03-01), Smith
patent: 4942615 (1990-07-01), Hirose
patent: 4967386 (1990-10-01), Maeda et al.
Hwang et al.; "Incremental Functional Simulation of Digital Circuits"; Abstract only 1987.
Hwang et al.; "Fast Functional Simulation: An Incremental Approach"; IEEE Trans. Com. Des.; vol. 7, No. 7, Jul. 1988.
Hollis, Chapter 6, Design of VLSI Gate Array ICs, Prentice-Hall, 1987, pp. 220-268.
Salz et al., "IRSIM: An Incremental MOS Switch-Level Simulator," ACM/IEEE (Aug. 1989).
Advertising brochure, "Verilog XL," Gateway Design Automation Corporation.
Advertising brochure, "Daisy design and verification tools: The foundation for a better design," Daisy Systems.

Affiliated with

Also associated with

Rating

Computer-aided engineering does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer-aided engineering, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer-aided engineering will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1418316