Boots – shoes – and leggings
Patent
1989-10-30
1992-12-29
Anderson, Lawrence E.
Boots, shoes, and leggings
364DIG1, 3642715, 364259, 3642591, G06F 900
Patent
active
051758431
ABSTRACT:
A computer-aided design method for restructuring computational networks to minimize latency and shim delay, suitable for use by a silicon compiler. Data-flow graphs for computational networks which use trees of operators, each performing associative and commutative combining of its respective imput operands to generate a respective output operand, are converted to data-flow graphs with multiple-input operators. Data-flow graphs with multiple-input operators, after being optimally scheduled, are converted to data-flow graphs which use trees of dual-input operators or of dual-input and three-input operators, those trees having minimum latency and shim delay associated with them. These data-flow graphs then have shim delay minimized in them, e.g. by being subjected to linear programming.
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Casavant Albert E.
Hartley Richard I.
Anderson Lawrence E.
Geckil Mehmet
General Electric Company
Snyder Marvin
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