Computationally and memory efficient tone ordering scheme

Details Computationally and memory efficient tone ordering scheme Computationally and memory efficient tone ordering scheme

2005-01-26

2009-02-24

Bocure, Tesfaldet (Department: 2611)

Pulse or digital communications

Transceivers

Modems

C375S377000

Reexamination Certificate

active

07496134

ABSTRACT:
An integrated circuit18is provided that includes a memory32and a memory modification component33.The memory32maintains a bits count, a gain, and a tone order for each of a plurality of discrete multi-tone sub-channels. The memory modification component33operable to control an in-service modification of at least some of the bits count, the gain, and the tone order using a single bits, gains and tone order table.

REFERENCES:
patent: 7191387 (2007-03-01), Massoudi
patent: 7406028 (2008-07-01), Kratochwil et al.
patent: 2001/0031011 (2001-10-01), Betts
patent: 2001/0033613 (2001-10-01), Vitenberg
patent: 2002/0080867 (2002-06-01), Abbas et al.
patent: 2005/0046592 (2005-03-01), Cooper et al.
patent: 2006/0023690 (2006-02-01), Umashankar et al.
patent: 2006/0269010 (2006-11-01), Betts

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