Computational method and apparatus for finite field arithmetic

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G06F 752

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045876274

ABSTRACT:
Elements of the finite field GF(2.sup.m) are represented by a vector of m binary digits in such a way that multiplication can be performed by using the same logic function to compute each binary component of the product of two elements, squaring can be performed by logic circuitry that rotates the vector representing the element to be squared, and addition can be performed by logic circuitry that forms the modulo-two sum of the corresponding components of the two vectors representing the elements to be summed.

REFERENCES:
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patent: 4162480 (1979-07-01), Berlekamp
patent: 4216531 (1980-08-01), Chiu
patent: 4251875 (1981-02-01), Marver et al.
Marver: "Sequential Galois Multipliers", Office of Naval Research, PX 12344 Aug. 1977, pp. 1-14.
Marver: "Complexity Reduction in Galois Logic Design", Office of Naval Research PX-12461, Dec. 1977, pp. 1-1-A-2.
Computation with Finite Fields, by Thomas C. Bartee and David I. Schneider, Information and Control 6, pp. 79-98, (1963).
The Synthesis of Nonlinear Feedback Shift Registers, by Kay Brossard Magleby, Oct. 1963, p. 12.

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