Computation apparatus and method

Details Computation apparatus and method Computation apparatus and method

1997-08-05

2000-05-02

Kizou, Hassan

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708404, G06F 1714

Patent

active

060584092

ABSTRACT:
A computation apparatus such as a Fast Fourier Transform (FFT) apparatus which processes ordered sets of data in a computation unit (4, 24) operating according to a high-speed clock includes an input buffer (1, 21) arranged to accept data in synchronism with a relatively low-speed clock, and an output buffer (6, 26) arranged to discharge the data in synchronism with the low-speed clock. The apparatus includes an internal memory (3, 23) as well as means such as selectors (2, 22) and (5, 25) for transferring data in synchronism with the high-speed clock from the input buffer to the computation unit or the memory; between the computation unit and the memory; and from the computation unit or the memory to the output buffer. The transferring means is arranged to reorder the data, preferably in reverse-digit sequence, during transfer from the input buffer or during transfer to the output buffer. This avoids the need for a separate reordering memory at the input end or output end of the device.

REFERENCES:
patent: 3617720 (1971-11-01), Gentleman
patent: 4138730 (1979-02-01), Ali
patent: 4298950 (1981-11-01), Smith, Jr.
patent: 4839844 (1989-06-01), Watari
patent: 5093801 (1992-03-01), White et al.
patent: 5293330 (1994-03-01), Sayegh
patent: 5473556 (1995-12-01), Aguilar et al.
patent: 5694347 (1997-12-01), Ireland

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