Compressed-domain bit rate reduction system

Television – Bandwidth reduction system – Data rate reduction

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Details

348411, 348412, 348405, 348409, 348415, H04N 718

Patent

active

056233124

ABSTRACT:
Improved bit rate reduction techniques are disclosed. When incorporated into an existing video processing system having a DCT coefficients processor, the motion vector processor disclosed herein provides enhanced computational and memory storage efficiencies over prior art designs. The motion vector processor includes a microprocessor and associated motion vector memory. The motion vector memory is adapted to store a plurality of motion vectors corresponding to at least one image frame containing a plurality of macro blocks. Each motion vector is represented by an X value and a Y value, the X value and the Y value signifying image changes within a given macro block from a given frame to the immediately preceding frame.

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