Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Patent
1996-07-02
2000-02-08
Guay, John
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
257316, H01L 29812, H01L 29788
Patent
active
060230797
ABSTRACT:
A compound semiconductor memory has a second semiconductor layer (undoped AlGaAs hetero-barrier layer), a third semiconductor layer (n type InGaAs layer), a fourth semiconductor layer (undoped AlGaAs layer) and a gate electrode of WSi selectively deposited in order on an n type first semiconductor layer (n type GaAs channel layer). A drain electrode and a source electrode, which are electrically connected to the first semiconductor layer are formed on those areas of the first semiconductor layer where the second semiconductor layer or the like is not formed. At this time, the potential barrier of a floating gate (third semiconductor layer) on the gate electrode side is set higher than the potential barrier of the floating gate (first semiconductor layer) on the channel layer side.
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J. A. Lott, et al., "Charge Storage in InAlAs/InGaAs/InP Floating Gate Heterostructures," Electronic Letters, Jul. 1990, vol. 26, No. 14, pp. 972-973.
Guay John
NEC Corporation
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