Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2003-05-27
2004-09-28
Baumeister, Bradley (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C257S198000
Reexamination Certificate
active
06797996
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to compound semiconductor devices, and more particularly relates to high-speed operating heterojunction bipolar transistors.
In heterojunction bipolar transistors (which will be herein referred to as “HBTs”), emitter injection efficiency (i.e., the ratio of electric current injected into a base layer to the entire emitter current) is increased by using, for an emitter layer, a semiconductor material having a wider bandgap than that of a material for a base layer. In other words, a heterojunction formed between the emitter layer and the base layer is utilized to increase the emitter injection efficiency. Thus, the thickness of the base can be reduced and thereby the impurity concentration in the base layer can be increased. Therefore, HBTs can operate at a high speed.
Moreover, HBTs utilizing the heterojunction between a base layer and a collector layer as well as the heterojunction between an emitter layer and the base layer are called “double heterojunction bipolar transistors” (which will be herein referred to as “DHBTs”). In DHBTs, compared to HBTs including a homojunction interface between a base layer and a collector layer, collector breakdown voltage is increased while collector-emitter offset voltage is reduced. Thus, operation properties of DHBTs can be advantageously improved with a low voltage applied.
In DHBTs, however, a semiconductor material having a wider bandgap than that of a material for a base layer is used as a material for a collector layer, and therefore an energy barrier is formed in the conduction band of the heterojunction interface between a collector layer and the base layer. The energy barrier blocks electrons' movement, resulting in the electron blocking effect of lowering current gain and degrading transistor properties. Then, as a conventional technique for preventing the electron blocking effect, a method in which the height of an energy barrier formed at a heterojunction interface is reduced by providing a setback layer interposed between a base layer and a collector layer is well known.
Note that a heterojunction interface means herein the interface between a semiconductor layer having a relatively narrow bandgap and a semiconductor layer having a relatively wide bandgap. Therefore, in a DHBT in which no setback layer is provided, the interface between a base layer and a collector layer is a heterojunction interface. On the other hand, in a DHBT in which a setback layer, e.g., formed of the same material as that of the base layer, is provided, the interface between the setback layer and a collector layer is a heterojunction interface.
FIG. 3
is a cross-sectional view of a conventional compound semiconductor device. More specifically,
FIG. 3
is a cross-sectional view of a DHBT including a setback layer.
As shown in
FIG. 3
, a buffer layer
11
formed of a GaAs layer, a sub-collector layer
12
formed of an n-type GaAs layer, a collector layer
13
formed of an n-type InGaP layer, a setback layer
14
formed of an undoped GaAs layer, a base layer
15
formed of a p-type GaAs layer, an emitter layer
16
formed of an n-type InGaP layer, a contact layer
17
formed of an n-type GaAs layer, and an emitter cap layer
18
formed of an n-type InGaAs layer are stacked in this order on a semiconductor substrate
10
formed of a GaAs substrate which is a semi-insulator. In this case, GaAs having a narrower bandgap than that of a material for the collector layer
13
(InGaP) is used as a material for the setback layer
14
. That is to say, the setback layer
14
is formed of the same material as that of the base layer
15
. Moreover, a collector electrode
19
is formed on a region of the sub-collector layer
12
on which the collector layer
13
does not exist. A base electrode
20
is formed on a region of the base layer
15
on which the emitter layer
16
does not exist. And an emitter electrode
21
is formed on the emitter cap layer
18
.
FIG. 4
is a diagram illustrating energy bandgaps in the FHBT shown in FIG.
3
.
As shown in
FIG. 4
, each of the energy bandgaps of the emitter layer
16
and the collector layer
13
is wider than that of the base layer
15
. It can be also seen from
FIG. 4
that with the setback layer
14
provided between the base layer
15
and the collector layer
13
, the height of the energy barrier formed at the heterojunction junction is reduced, and thus electrons can easily move from the base layer
15
to the collector layer
13
.
However, the DHBT of
FIG. 3
, i.e., a conventional compound semiconductor device, still has a problem in which, although the height of the energy barrier seen from electrons can be reduced to a certain level by providing the setback layer
14
, the electron blocking effect can not be completely prevented.
SUMMARY OF THE INVENTION
In view of the above-described problems, an object of the present invention is to ensure prevention of the electron blocking effect in a double heterojunction bipolar transistor.
To attain the above-described object, a first compound semiconductor device according to the present invention is assumed to include: an emitter layer; a base layer which is in contact with the emitter layer and formed of a first compound semiconductor; and a collector layer which is in contact with the base layer and formed of a second compound semiconductor having a wider bandgap than that of the first compound semiconductor. In the device, a delta doped layer having a higher concentration of an impurity than that of the collector layer is formed in a region of the collector layer located at about 10 nm or less from the heterojunction interface with the base layer.
In the first compound semiconductor device, the delta doped layer is provided in a region of the collector layer located in the vicinity of the heterojunction interface with the base layer. Thus, the thickness of an energy barrier formed at the heterojunction interface is reduced and electrons can easily pass through the energy barrier. Therefore, it is possible to suppress the energy barrier's blocking of movement of electrons injected from the base layer to the collector layer, and thus the electron blocking effect can be reliably prevented. Accordingly, current gain is increased and thus transistor properties can be improved, resulting in, e.g., a highly effective double heterojunction bipolar transistor suitable for high-speed operation.
To attain the above-described object, a second compound semiconductor device according to the present invention is assumed to include: an emitter layer; a base layer which is in contact with the emitter layer and formed of a first compound semiconductor; a collector layer which is in contact with the base layer and formed of a second compound semiconductor having a wider bandgap than that of the first compound semiconductor. In the device, a delta doped layer having a higher concentration of an impurity than that of the collector layer is formed at the heterojunction interface between the collector layer and the base layer.
In the second compound semiconductor, the delta doped layer is provided at the heterojunction interface between the collector layer and the base layer. Thus, the height of an energy barrier formed at the heterojunction interface is reduced and electrons can easily go over the energy barrier. Therefore, it is possible to suppress the energy barrier's blocking of movement of electrons injected from the base layer into the collector layer, and thus the electron blocking effect can be reliably prevented. Accordingly, current gain is increased and thus transistor properties can be improved, resulting in, e.g., a highly effective double heterojunction bipolar transistor suitable for high-speed operation.
A third compound semiconductor device according to the present invention is assumed to include: an emitter layer; a base layer which is in contact with the emitter layer and formed of a first compound semiconductor; and a collector layer which is in contact with the base layer and formed of a secon
Hikita Masahiro
Tanaka Tuyoshi
Yanagihara Manabu
Baumeister Bradley
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
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