Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Having graded composition
Patent
1992-08-17
1994-08-30
Sikes, William L.
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Having graded composition
257192, 257194, 257 22, H01L 29205, H01L 2980, H01L 29161
Patent
active
053430565
ABSTRACT:
A compound semiconductor device includes an undoped semiconductor layer; a doped semiconductor layer formed on the undoped semiconductor layer and having smaller electron affinity than the undoped semiconductor layer, impurities being doped in the doped semiconductor layer; a gate electrode formed on the doped semiconductor layer; and a source electrode and a drain electrode respectively formed at both sides of the gate electrode, wherein an impurity concentration of the doped semiconductor layer is selected such that a portion of the doped semiconductor layer located immediately below the gate electrode is not completely depleted in a state in which a gate voltage is not applied to the gate electrode, and is completely depleted in a state in which a negative voltage for minimizing a noise figure is applied to the gate electrode.
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Lee et al., "Charge Control Model of Inverted GaAs-AIGaAs Modulation Doped FET's (IMODFET's)", Journal of Vacuum Science & Technology B (Microelectronics Processing and Phenomena), vol. 2, 2nd Seris, pp. 113-116 (1984).
Schubert et al., "Self-Aligned Enhancement-Mode and Depletion--Mode GaAs Field-Effect Transistors Employing the .delta.-Doping Technique", Applied Physics Letters, vol. 49, No. 25, pp. 1729-1731 (Dec. 1986).
European Search Report dated Dec. 14, 1993 in Application No. EP 92 11 4718.7.
Abraham Fetsum
Rohm & Co., Ltd.
Sikes William L.
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