Compositions – Barrier layer device compositions – Group iii element containing binary compound; e.g. – ga – as
Reexamination Certificate
2000-08-17
2004-04-13
Koslow, C. Melissa (Department: 1755)
Compositions
Barrier layer device compositions
Group iii element containing binary compound; e.g., ga, as
Reexamination Certificate
active
06719919
ABSTRACT:
TECHNICAL FIELD
The invention pertains to compositions of matter comprising silicon bonded to both nitrogen and an organic material. The invention further pertains to semiconductor devices incorporating the above-described compositions of matter, and to methods of forming semiconductor devices. In particular aspects, the invention pertains to semiconductor devices incorporating copper-containing materials, and to methods of forming such devices.
BACKGROUND OF THE INVENTION
It would be desirable to employ copper-containing materials in semiconductor devices. Copper has conductive properties that are superior to those of many of the conductive materials presently utilized in semiconductor devices. Unfortunately, copper has a drawback associated with it that it cannot generally be placed against oxide-comprising insulative materials (such as, for example, silicon dioxide). If copper-containing materials are placed adjacent oxide-comprising insulative materials, oxygen can diffuse into the copper-containing material and react to reduce conductivity of the material. Also, copper can diffuse into the oxide-containing material to reduce the insulative properties of the oxide-containing material. Additionally, copper can diffuse through oxide insulative material to device regions and cause degradation of device (e.g., transistor) performance. The problems associated with copper are occasionally addressed by providing nitride-containing barrier layers adjacent the copper-containing materials, but such can result in problems associated with parasitic capacitance, as illustrated in FIG.
1
. Specifically,
FIG. 1
illustrates a fragment of a prior art integrated circuit, and illustrates regions where parasitic capacitance can occur.
The structure of
FIG. 1
comprises a substrate
10
, and transistor gates
12
and
14
overlying substrate
10
. Substrate
10
can comprise, for example, monocrystalline silicon lightly doped with a p-type background conductivity-enhancing dopant. To aid in interpretation of the claims that follow, the term “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
Transistor gates
12
and
14
can comprise conventional constructions such as overlying layers of gate oxide, polysilicon and silicide. Insulative spacers
16
are formed adjacent transistor gates
12
and
14
, and conductively doped diffusion regions
18
,
20
and
22
are formed within substrate
10
and proximate gates
12
and
14
. Also, isolation regions
24
(shown as shallow trench isolation regions) are formed within substrate
10
and electrically isolate diffusion regions
18
and
22
from other circuitry (not shown) provided within and over substrate
10
.
An insulative material
26
extends over substrate
10
, and over transistor gates
12
and
14
. A conductive plug
28
extends through insulative material
26
to contact conductive diffusion region
20
. Conductive plug
28
can comprise, for example, conductively doped polysilicon. Insulative material
26
can comprise, for example, silicon dioxide or borophosphosilicate glass (BPSG). Insulative material
26
and plug
28
together comprise a planarized upper surface
29
. Planarized surface
29
can be formed by, for example, chemical-mechanical polishing.
A second insulative material
30
is formed over insulative material
26
and on planarized upper surface
29
. Second insulative material
30
can comprise, for example, borophosphosilicate glass or silicon dioxide. A conductive material
32
is formed within an opening in insulative material
30
and over conductive plug
28
. Conductive material
32
comprises copper. The copper can be, for example, in the form of elemental copper, or in the form of an alloy. Conductive material
32
is separated from conductive plug
28
by an intervening barrier layer
34
. Barrier layer
34
typically comprises a conductive material, such as titanium nitride (TiN) or tantalum nitride (TaN), and is provided to prevent out-diffusion of copper from conductive material
32
into either insulative material
26
or the polysilicon of conductive plug
28
. Barrier layer
34
can also prevent diffusion of silicon or oxygen from layers
26
,
28
and
30
into the copper of conductive material
32
. It is desired to prevent diffusion of oxygen to the copper of material
32
, as such oxygen could otherwise reduce conductance of material
32
. Also, it is desired to prevent copper diffusion from material
32
into insulative layer
26
, as such copper could reduce the insulative properties of the material of layer
26
. Additionally, diffusion through layer
26
and into one or more of regions
18
,
20
and
22
can reduce the performance of transistor devices.
A second conductive material
36
is provided over insulative material
26
and spaced from first conductive material
32
. Second conductive material
36
can comprise, for example, conductively doped polysilicon or a conductive metal, or a combination of two or more conductive materials (such as copper and TiN). Second conductive material
36
is spaced from first conductive material
32
by an intervening region of insulative material
30
and barrier layer
34
.
Insulative material
30
, barrier layer
34
, first conductive material
32
and second conductive material
36
share a common planarized upper surface
37
. Planarized upper surface
37
can be formed by, for example, chemical-mechanical polishing.
An insulative barrier layer
38
is provided over planarized upper surface
37
. Insulative barrier layer
38
can comprise, for example, silicon nitride.
An insulative layer
40
is provided over insulative barrier layer
38
. Insulative layer
40
can comprise, for example, silicon dioxide or BPSG. Insulative barrier layer
38
inhibits diffusion of copper from first conductive material
32
into insulative layer
40
, and inhibits diffusion of oxygen from insulative layer
40
into first conductive material
32
.
Another insulative layer
42
is provided over insulative layer
40
, and a third conductive material
44
is provided within insulative material
42
and over first conductive material
32
. Insulative material
42
can comprise, for example, BPSG or silicon dioxide, and third conductive material
44
can comprise, for example, conductively doped polysilicon or a metal, or a combination of two or more conductive materials (such as copper and TiN).
Conductive materials
32
,
36
and
44
can be conductive interconnects between electrical devices, or portions of electrical devices. The function of materials
32
,
36
and
44
within a semiconductor circuit is not germane to this discussion. Instead, it is the orientation of conductive materials
32
,
36
and
44
relative to one another that is of interest to the present discussion. Specifically, each of materials
32
,
36
and
44
is separated from the other materials by intervening insulative (or dielectric) materials. Accordingly, parasitic capacitance can occur between the conductive materials
32
,
36
and
44
. A method of reducing the parasitic capacitance is to utilize insulative materials that have relatively low dielectric constants (“k”). For instance, as silicon dioxide has a lower dielectric constant that silicon nitride, it is generally preferable to utilize silicon dioxide between adjacent conductive components, rather than silicon nitride. However, as discussed previously, copper-containing materials are preferably not provided against silicon dioxide due to diffusion problems that can occur. Accordingly, when copper is utilized as a conductive material in a structure, it must generally be spaced from silicon dioxide-comp
Li Weimin
Yin Zhiping
Koslow C. Melissa
Micro)n Technology, Inc.
Wells St. John P.S.
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