Composition and method for planarizing surfaces

Abrading – Abrading process – Glass or stone abrading

Reexamination Certificate

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C451S036000, C451S060000, C051S308000, C051S309000

Reexamination Certificate

active

06319096

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to a composition and method for planarizing or polishing a surface, such as the surface of a semiconductor.
BACKGROUND OF THE INVENTION
Compositions for planarizing or polishing the surface of a substrate are well known in the art. Polishing slurries typically contain an abrasive material in an aqueous solution and are applied to a surface by contacting the surface with a polishing pad saturated with the slurry composition. Typical abrasive materials include silicon dioxide, cerium oxide, aluminum oxide, zirconium oxide, and tin oxide. U.S. Pat. No. 5,527,423, for example, describes a method for chemically-mechanically polishing a metal layer by contacting the surface with a polishing slurry comprising high purity fine metal oxide particles in an aqueous medium.
Conventional polishing compositions typically are not entirely satisfactory at planarizing semiconductor wafers. In particular, polishing slurries can have less than desirable polishing rates, and their use in chemically-mechanically polishing semiconductor surfaces can result in poor surface quality. Because the performance of a semiconductor wafer is directly associated with the planarity of its surface, it is crucial to use a polishing composition that has a high polishing efficiency, uniformity, and removal rate and leaves a high quality polish with minimal surface defects.
The difficulty in creating an effective polishing composition for semiconductor wafers stems from the complexity of the semiconductor wafer. Semiconductor wafers are typically composed of a substrate, on which a plurality of transistors has been formed. Integrated circuits are chemically and physically connected into a substrate by patterning regions in the substrate and layers on the substrate. To produce an operable semiconductor wafer and to maximize the yield, performance, and reliability of the wafer, it is desirable to polish select surfaces of the wafer without adversely affecting underlying structures or topography. In fact, various problems in semiconductor fabrication can occur if the process steps are not performed on wafer surfaces that are adequately planarized.
There have been many attempts to improve the polishing efficiency and uniformity of conventional polishing agents, while minimizing defectivity of the polished surface and damage to underlying structures or topography. For example, U.S. Pat. No. 5,264,010 describes a polishing composition comprising cerium oxide, fumed silica, and precipitated silica, which purportedly yields an improved removal rate and polishing efficiency.
A need remains, however, for compositions and methods that will exhibit desirable planarization efficiency, uniformity, and removal rate during the polishing and planarization of substrates, while minimizing defectivity, such as surface imperfections and damage to underlying structures and topography during polishing and planarization. The present invention seeks to provide such a composition and method. These and other advantages of the present invention will be apparent from the description of the invention provided herein.
BRIEF SUMMARY OF THE INVENTION
The present invention is directed to a composition for planarizing or polishing a surface. The polishing composition of the present invention comprises (a) a liquid carrier and (b) solids comprising about 5-90 wt. % of fumed metal oxide and about 10-95 wt. % of abrasive particles, wherein about 90% or more of the abrasive particles (i.e., by number) have a particle size no greater than 100 nm. The present invention also provides a method of planarizing or polishing a surface comprising contacting the surface with the composition of the present invention.


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Patent Abstracts of Japan, vol. 2000, No. 05 (Sep. 14, 2000) (JP 2000 042904 A (Feb. 15, 2000).

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