Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Reexamination Certificate
2005-01-11
2005-01-11
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
C257S347000, C257S622000, C438S455000
Reexamination Certificate
active
06841848
ABSTRACT:
A composite SOI semiconductor wafer (1) comprises a device layer (2) and a handle layer (3) with a buried oxide layer (4) located between the device and handle layers (2,3). The device and handle layers (2,3) are formed from device and handle wafers (9,10), respectively. A peripheral ridge (14) extending around a first major surface (12) of the device wafer (9) adjacent the peripheral edge (16) thereof is removed by etching a peripheral recess (25) to a depth (d) into the device wafer (9) prior to bonding the device and handle wafers (9,10), in order to avoid an unbonded peripheral pardon extending around the composite wafer (1). The depth to which the peripheral recess (25) is etched is greater then the final finished thickness t of the device layer (2). An oxide layer (22) is grown on the device water (9) and a photoresist layer (23) on the oxide layer (22) is patterned to define the peripheral recess (25). The oxide layer (22) is etched leaving only a portion of the oxide layer (22) beneath the photoresist layer (23), which subsequently forms the oxide layer (4). The peripheral recess (25) is then etched, and the photoresist layer (23) is removed. The oxide layer (22) is fusion bonded to a first major surface (18) of the handle wafer (10) by a high temperature bond anneal. Thereafter the device layer (2) is machined to its final finished thickness t.
REFERENCES:
patent: 5340435 (1994-08-01), Ito et al.
patent: 5373184 (1994-12-01), Moslehi
patent: 6008113 (1999-12-01), Ismail et al.
patent: 6189159 (2001-02-01), Bailey et al.
MacNamara Cormac John
Nevin William Andrew
Peters Graeme
Analog Devices Inc.
Gauthier & Connors LLP
Potter Roy
LandOfFree
Composite semiconductor wafer and a method for forming the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Composite semiconductor wafer and a method for forming the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Composite semiconductor wafer and a method for forming the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3368883