Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2001-06-08
2002-07-30
Talbott, David L. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S703000, C257S758000, C257S759000, C361S312000, C361S321100, C361S321200, C361S321300, C428S210000
Reexamination Certificate
active
06426551
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to composite monolithic electronic components comprising a sintered laminate formed by stacking and baking unsintered material layers composed of various types of materials. Specifically, the present invention relates to a composite monolithic electronic component provided in its interior with a passive device such as a capacitor and an inductor.
2. Description of the Related Art
Generally, insulative ceramic substrates are widely used for mounting various electronic components constituting electronic circuits in order to meet the demand for smaller electronic devices.
In order to further increase the mounting density and to withstand higher frequencies, a monolithic ceramic substrate prepared by baking a green laminate comprising a plurality of stacked ceramic green sheets, each of which is a low-dielectric-coefficient insulative ceramic layer having the relative dielectric coefficient of 15 or less, and interconnecting conductors composed of a conductive paste containing a low-resistance conductive substance such as Ag, Ag—Pd, Cu, Au or the like, which are patterned into a predetermined shape and which are provided on each of the ceramic green sheets, has been developed.
In order to further increase the mounting density from that of the substrate comprising the above-described low-dielectric-coefficient insulative ceramic layers, a substrate combining various types of materials, more particularly, a substrate comprising a dielectric layer having a relatively high dielectric coefficient and a functional layer, such as a magnetic layer having different permeability or a resistance layer having a different resistance, is desired since such a structure is capable of accommodating a passive element such as a capacitor, an inductor and/or a resistor, in an improved manner.
The aforementioned monolithic ceramic substrate comprising the low-dielectric-coefficient ceramic layers are mainly used in packages or circuits boards for mounting large-size IC chips comprising Si or Ga—As. In order to prevent the interface between the IC chip and the monolithic ceramic substrate from becoming defective due to thermal stresses, the thermal expansion coefficient of the low-dielectric-coefficient insulative material constituting the ceramic layers is set to approximately the same value as the thermal expansion coefficient of the IC chip (Si: 3.6 ppm/°C., Ga—As: 6.8 ppm/°C.).
In this respect, a composite material in which a glass such as borosilicate glass, borosilicate lead glass, lead silicate glass or the like, is added to a ceramic material such as alumina, cordierite, mullite or the like, is used as the low-dielectric-coefficient insulative material. Thus, it becomes possible to set the thermal expansion coefficient of the low-dielectric-coefficient insulative material to approximately the same value as that of the IC chip and to sinter the material at a temperature of 1,000° C. or less.
A multichip-module-type mounting substrate, that is, the circuit board (package) provided with a plurality of bare chips, will be more widely used as a high-density mounting module in the near future. Presently, when a flip chip is mounted on the mounting substrate, solder is used as an I/O interface to provide bonding. An interface portion (land portion) at which the flip chip contacts the mounting substrate is formed into a slope by a material having mechanical characteristics between that of the solder and that of each material. Moreover, an underfill material is provided after bonding in order to alleviate stresses. Alternatively, a conductive adhesive may be used to form the I/O termination in order to alleviate stresses.
In view of the above, the problem of defects due to thermal stresses at the interface between the IC chip and the monolithic ceramic substrate has been already solved.
In contrast, the thermal expansion coefficient of most of the high-dielectric-coefficient material constituting the dielectric layer having a relatively high dielectric coefficient in the above-described substrate combining various materials, except for PbO-based perovskite materials, is 8 ppm/°C. or more. The PbO-based perovskite material contains large amounts of PbO and is hazardous to the environment. The thermal expansion coefficient of most of the magnetic materials, i.e., ferrite, constituting the magnetic layer having different permeability is also 8 ppm/°C. or more.
The problems caused by the thermal stresses created when a passive element composed of a high-dielectric-coefficient material or a magnetic material, such as a capacitor or an inductor, is vertically or horizontally provided inside the monolithic substrate is more serious than problem created by the thermal stress between the IC chip and the mounting substrate. To be more specific, when the monolithic ceramic substrate is composed of various types of materials, the interface at which the different types of materials come into contact with each other is large compared to the interface between the IC chip and the substrate, and it is difficult to release the thermal stresses since the interface is located inside the monolithic ceramic substrate.
As a result, defects such as cracks which result from differences in thermal expansion coefficients, are likely to occur at the interfaces between the various different materials even when there is no defect at the IC chip.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a composite monolithic electronic component comprising a combination of different types of materials which overcomes the above-described problems.
This invention is directed to a composite monolithic electronic component comprising: a laminate having a base layer which is a low-dielectric-coefficient layer having a relative dielectric coefficient of about 10 or less and a functional layer which is a magnetic layer and/or a high-dielectric-coefficient layer having a relative dielectric coefficient of about 15 or more; and interconnecting conductors provided for the laminate. The laminate and the interconnecting conductors are simultaneously baked.
In order to solve the above-described technical problems, a low-dielectric-coefficient material having a high-thermal-expansion-coefficient is needed as the material of the base layer in the composite monolithic electronic component. The low-dielectric-coefficient material is also required to have mechanical strength.
One way to meet these needs is to use a crystallized glass having a relatively high mechanical strength in the base layer. However, when the crystallized glass is used in the base layer, dispersion from/to various types of materials, i.e., dispersion between the base layer and the functional layer, and wetting between the materials included in the base layers occurs, thereby causing a failure to obtain the desired crystallized substances. A crystallized glass which allows a desired crystal phase having a high-thermal expansion-coefficient to precipitate efficiently is needed.
Therefore, according to one aspect of the present invention, the base layer contains a crystallized glass comprising SiO
2
, MgO, Al
2
O
3
and B
2
O
3
, and an oxide ceramic having a thermal expansion coefficient of about 6.0 ppm/°C. or more. The functional layer contains an amorphous glass having a softening point of about 800° C. or less.
In this composite monolithic electronic component, a bondability is obtained by the crystallized glass contained in the base layer and the amorphous glass contained in the functional layer. When bonding is achieved in this manner, not only can the base layer and the functional layer be sintered at a low temperature of about 1,000° C. or less, but also residual stresses can be disregarded above the glass distortion point. By using a low-softening-point glass, the stresses occurring at the bonding interfaces (residual stresses) can be significantly decreased compared to a solid-state-reaction bonding if the thermal expansion coefficients of these layers at
Kawakami Hiromichi
Sunahara Hirofumi
Chambliss Alonzo
Dickstein , Shapiro, Morin & Oshinsky, LLP
Murata Manufacturing Co. Ltd
Talbott David L.
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